fmd21 integration

Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>

Prev fmd integration was fmd19
Diffs from fmd19 to fmd21:

Added kgHashShift to t_FmPcdHashTableParams
Added nonConsistentSp to t_FmPcdManipReassemIpStats

sp - 2 layers separation - for future flib integration
rtc - 2 layers separation - for future flib integration

PFC enhancement (B4 Rev2 FMAN)
API addition (for B4 rev 2): FM_PORT_SetPfcPrioritiesMappingToQmanWQ

File fsl_fman.h renamed to lnxwrp_fsl_fman.h
The name fsl_fman.h has been applied to other fman internal header file

In dpaa_eth:
Due to renaming of fsl_fman.h to lnxwrp_fsl_fman.h
The relevant include lines in some of the files had to change accordingly

Change-Id: I8f25c758963a44a75ca8676aad45f7f96767b0b5
Reviewed-on: http://git.am.freescale.net:8181/2069
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>

4 files changed, 418 insertions, 381 deletions

diff --git a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/Makefile b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/Makefile
index b82bb6f..f804c51 100644
--- a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/Makefile
+++ b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/Makefile
@@ -12,4 +12,4 @@ EXTRA_CFLAGS += -I$(NCSW_FM_INC)
 
 obj-y		+= fsl-ncsw-RTC.o
 
-fsl-ncsw-RTC-objs	:=   fm_rtc.o
+fsl-ncsw-RTC-objs	:=   fm_rtc.o fman_rtc.o
diff --git a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fm_rtc.c b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fm_rtc.c
index d65b1d4..d036fcd 100644
--- a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fm_rtc.c
+++ b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fm_rtc.c
@@ -50,38 +50,16 @@
 #include "fm_common.h"
 
 
-/*****************************************************************************/
-static void SetDefaultParam(t_FmRtc *p_Rtc)
-{
-    t_FmRtcDriverParam  *p_RtcDriverParam = p_Rtc->p_RtcDriverParam;
-    int                 i;
-
-    p_Rtc->outputClockDivisor = DEFAULT_outputClockDivisor;
-    p_Rtc->p_RtcDriverParam->bypass = DEFAULT_bypass;
-    p_RtcDriverParam->srcClk = DEFAULT_srcClock;
-    p_RtcDriverParam->invertInputClkPhase = DEFAULT_invertInputClkPhase;
-    p_RtcDriverParam->invertOutputClkPhase = DEFAULT_invertOutputClkPhase;
-    p_RtcDriverParam->pulseRealign = DEFAULT_pulseRealign;
-    for (i=0; i < FM_RTC_NUM_OF_ALARMS; i++)
-    {
-        p_RtcDriverParam->alarmPolarity[i] = DEFAULT_alarmPolarity;
-    }
-    for (i=0; i < FM_RTC_NUM_OF_EXT_TRIGGERS; i++)
-    {
-        p_RtcDriverParam->triggerPolarity[i] = DEFAULT_triggerPolarity;
-    }
-    p_Rtc->clockPeriodNanoSec = DEFAULT_clockPeriod; /* 1 usec */
-}
 
 /*****************************************************************************/
 static t_Error CheckInitParameters(t_FmRtc *p_Rtc)
 {
-    t_FmRtcDriverParam  *p_RtcDriverParam = p_Rtc->p_RtcDriverParam;
+    struct rtc_cfg  *p_RtcDriverParam = p_Rtc->p_RtcDriverParam;
     int                 i;
 
-    if ((p_RtcDriverParam->srcClk != e_FM_RTC_SOURCE_CLOCK_EXTERNAL) &&
-        (p_RtcDriverParam->srcClk != e_FM_RTC_SOURCE_CLOCK_SYSTEM) &&
-        (p_RtcDriverParam->srcClk != e_FM_RTC_SOURCE_CLOCK_OSCILATOR))
+    if ((p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_EXTERNAL) &&
+        (p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_SYSTEM) &&
+        (p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR))
         RETURN_ERROR(MAJOR, E_INVALID_CLOCK, ("Source clock undefined"));
 
     if (p_Rtc->outputClockDivisor == 0)
@@ -92,16 +70,16 @@ static t_Error CheckInitParameters(t_FmRtc *p_Rtc)
 
     for (i=0; i < FM_RTC_NUM_OF_ALARMS; i++)
     {
-        if ((p_RtcDriverParam->alarmPolarity[i] != e_FM_RTC_ALARM_POLARITY_ACTIVE_LOW) &&
-            (p_RtcDriverParam->alarmPolarity[i] != e_FM_RTC_ALARM_POLARITY_ACTIVE_HIGH))
+        if ((p_RtcDriverParam->alarm_polarity[i] != E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW) &&
+            (p_RtcDriverParam->alarm_polarity[i] != E_FMAN_RTC_ALARM_POLARITY_ACTIVE_HIGH))
         {
             RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm %d signal polarity", i));
         }
     }
     for (i=0; i < FM_RTC_NUM_OF_EXT_TRIGGERS; i++)
     {
-        if ((p_RtcDriverParam->triggerPolarity[i] != e_FM_RTC_TRIGGER_ON_FALLING_EDGE) &&
-            (p_RtcDriverParam->triggerPolarity[i] != e_FM_RTC_TRIGGER_ON_RISING_EDGE))
+        if ((p_RtcDriverParam->trigger_polarity[i] != E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE) &&
+            (p_RtcDriverParam->trigger_polarity[i] != E_FMAN_RTC_TRIGGER_ON_RISING_EDGE))
         {
             RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Trigger %d signal polarity", i));
         }
@@ -114,55 +92,49 @@ static t_Error CheckInitParameters(t_FmRtc *p_Rtc)
 static void RtcExceptions(t_Handle h_FmRtc)
 {
     t_FmRtc             *p_Rtc = (t_FmRtc *)h_FmRtc;
-    t_FmRtcMemMap       *p_MemMap;
+    struct rtc_regs     *p_MemMap;
     register uint32_t   events;
 
     ASSERT_COND(p_Rtc);
     p_MemMap = p_Rtc->p_MemMap;
 
-    /* Get valid events */
-    events =  GET_UINT32(p_MemMap->tmr_tevent);
-    events &= GET_UINT32(p_MemMap->tmr_temask);
-
-    /* Clear event bits */
-    WRITE_UINT32(p_MemMap->tmr_tevent, events);
-
-    if (events & TMR_TEVENT_ALM1)
+    events = fman_rtc_check_and_clear_event(p_MemMap);
+    if (events & FMAN_RTC_TMR_TEVENT_ALM1)
     {
         if (p_Rtc->alarmParams[0].clearOnExpiration)
         {
-            WRITE_UINT32(p_MemMap->tmr_alarm[0].tmr_alarm_l, 0);
-            WRITE_UINT32(p_MemMap->tmr_temask, GET_UINT32(p_MemMap->tmr_temask) & ~TMR_TEVENT_ALM1);
+            fman_rtc_set_timer_alarm_l(p_MemMap, 0, 0);
+            fman_rtc_disable_interupt(p_MemMap, FMAN_RTC_TMR_TEVENT_ALM1);
         }
         ASSERT_COND(p_Rtc->alarmParams[0].f_AlarmCallback);
         p_Rtc->alarmParams[0].f_AlarmCallback(p_Rtc->h_App, 0);
     }
-    if (events & TMR_TEVENT_ALM2)
+    if (events & FMAN_RTC_TMR_TEVENT_ALM2)
     {
         if (p_Rtc->alarmParams[1].clearOnExpiration)
         {
-            WRITE_UINT32(p_MemMap->tmr_alarm[1].tmr_alarm_l, 0);
-            WRITE_UINT32(p_MemMap->tmr_temask, GET_UINT32(p_MemMap->tmr_temask) & ~TMR_TEVENT_ALM2);
+            fman_rtc_set_timer_alarm_l(p_MemMap, 1, 0);
+            fman_rtc_disable_interupt(p_MemMap, FMAN_RTC_TMR_TEVENT_ALM2);
         }
         ASSERT_COND(p_Rtc->alarmParams[1].f_AlarmCallback);
         p_Rtc->alarmParams[1].f_AlarmCallback(p_Rtc->h_App, 1);
     }
-    if (events & TMR_TEVENT_PP1)
+    if (events & FMAN_RTC_TMR_TEVENT_PP1)
     {
         ASSERT_COND(p_Rtc->periodicPulseParams[0].f_PeriodicPulseCallback);
         p_Rtc->periodicPulseParams[0].f_PeriodicPulseCallback(p_Rtc->h_App, 0);
     }
-    if (events & TMR_TEVENT_PP2)
+    if (events & FMAN_RTC_TMR_TEVENT_PP2)
     {
         ASSERT_COND(p_Rtc->periodicPulseParams[1].f_PeriodicPulseCallback);
         p_Rtc->periodicPulseParams[1].f_PeriodicPulseCallback(p_Rtc->h_App, 1);
     }
-    if (events & TMR_TEVENT_ETS1)
+    if (events & FMAN_RTC_TMR_TEVENT_ETS1)
     {
         ASSERT_COND(p_Rtc->externalTriggerParams[0].f_ExternalTriggerCallback);
         p_Rtc->externalTriggerParams[0].f_ExternalTriggerCallback(p_Rtc->h_App, 0);
     }
-    if (events & TMR_TEVENT_ETS2)
+    if (events & FMAN_RTC_TMR_TEVENT_ETS2)
     {
         ASSERT_COND(p_Rtc->externalTriggerParams[1].f_ExternalTriggerCallback);
         p_Rtc->externalTriggerParams[1].f_ExternalTriggerCallback(p_Rtc->h_App, 1);
@@ -188,7 +160,7 @@ t_Handle FM_RTC_Config(t_FmRtcParams *p_FmRtcParam)
     memset(p_Rtc, 0, sizeof(t_FmRtc));
 
     /* Allocate memory for the FM RTC driver parameters */
-    p_Rtc->p_RtcDriverParam = (t_FmRtcDriverParam *)XX_Malloc(sizeof(t_FmRtcDriverParam));
+    p_Rtc->p_RtcDriverParam = (struct rtc_cfg *)XX_Malloc(sizeof(struct rtc_cfg));
     if (!p_Rtc->p_RtcDriverParam)
     {
         REPORT_ERROR(MAJOR, E_NO_MEMORY, ("FM RTC driver parameters"));
@@ -196,16 +168,21 @@ t_Handle FM_RTC_Config(t_FmRtcParams *p_FmRtcParam)
         return NULL;
     }
 
-    memset(p_Rtc->p_RtcDriverParam, 0, sizeof(t_FmRtcDriverParam));
+    memset(p_Rtc->p_RtcDriverParam, 0, sizeof(struct rtc_cfg));
 
     /* Store RTC configuration parameters */
     p_Rtc->h_Fm = p_FmRtcParam->h_Fm;
 
     /* Set default RTC configuration parameters */
-    SetDefaultParam(p_Rtc);
+    fman_rtc_defconfig(p_Rtc->p_RtcDriverParam);
+
+    p_Rtc->outputClockDivisor = DEFAULT_OUTPUT_CLOCK_DIVISOR;
+    p_Rtc->p_RtcDriverParam->bypass = DEFAULT_BYPASS;
+    p_Rtc->clockPeriodNanoSec = DEFAULT_CLOCK_PERIOD; /* 1 usec */
+
 
     /* Store RTC parameters in the RTC control structure */
-    p_Rtc->p_MemMap = (t_FmRtcMemMap *)UINT_TO_PTR(p_FmRtcParam->baseAddress);
+    p_Rtc->p_MemMap = (struct rtc_regs *)UINT_TO_PTR(p_FmRtcParam->baseAddress);
     p_Rtc->h_App    = p_FmRtcParam->h_App;
 
     return p_Rtc;
@@ -215,12 +192,11 @@ t_Handle FM_RTC_Config(t_FmRtcParams *p_FmRtcParam)
 t_Error FM_RTC_Init(t_Handle h_FmRtc)
 {
     t_FmRtc             *p_Rtc = (t_FmRtc *)h_FmRtc;
-    t_FmRtcDriverParam  *p_RtcDriverParam;
-    t_FmRtcMemMap       *p_MemMap;
-    uint32_t            freqCompensation;
-    uint32_t            tmrCtrl;
-    int                 i;
+    struct rtc_cfg      *p_RtcDriverParam;
+    struct rtc_regs     *p_MemMap;
+    uint32_t            freqCompensation = 0;
     uint64_t            tmpDouble;
+    bool                init_freq_comp = FALSE;
 
     p_RtcDriverParam = p_Rtc->p_RtcDriverParam;
     p_MemMap = p_Rtc->p_MemMap;
@@ -230,85 +206,28 @@ t_Error FM_RTC_Init(t_Handle h_FmRtc)
                      ("Init Parameters are not Valid"));
 
     /* TODO check that no timestamping MACs are working in this stage. */
-    WRITE_UINT32(p_MemMap->tmr_ctrl, TMR_CTRL_TMSR);
-    XX_UDelay(10);
-    WRITE_UINT32(p_MemMap->tmr_ctrl, 0);
-
-    /* Set the source clock */
-    switch (p_RtcDriverParam->srcClk)
-    {
-        case e_FM_RTC_SOURCE_CLOCK_SYSTEM:
-            tmrCtrl = TMR_CTRL_CKSEL_MAC_CLK;
-            break;
-        case e_FM_RTC_SOURCE_CLOCK_OSCILATOR:
-            tmrCtrl = TMR_CTRL_CKSEL_OSC_CLK;
-            break;
-        default:
-            /* Use a clock from the External TMR reference clock.*/
-            tmrCtrl = TMR_CTRL_CKSEL_EXT_CLK;
-            break;
-    }
-
-    /* whatever period the user picked, the timestamp will advance in '1' every time
-     * the period passed. */
-    tmrCtrl |= ((1 << TMR_CTRL_TCLK_PERIOD_SHIFT) & TMR_CTRL_TCLK_PERIOD_MASK);
-
-    if (p_RtcDriverParam->invertInputClkPhase)
-        tmrCtrl |= TMR_CTRL_CIPH;
-    if (p_RtcDriverParam->invertOutputClkPhase)
-        tmrCtrl |= TMR_CTRL_COPH;
-
-    for (i=0; i < FM_RTC_NUM_OF_ALARMS; i++)
-    {
-        if (p_RtcDriverParam->alarmPolarity[i] == e_FM_RTC_ALARM_POLARITY_ACTIVE_LOW)
-            tmrCtrl |= (TMR_CTRL_ALMP1 >> i);
-    }
-
-    for (i=0; i < FM_RTC_NUM_OF_EXT_TRIGGERS; i++)
-        if (p_RtcDriverParam->triggerPolarity[i] == e_FM_RTC_TRIGGER_ON_FALLING_EDGE)
-            tmrCtrl |= (TMR_CTRL_ETEP1 << i);
-
-    if (!p_RtcDriverParam->timerSlaveMode && p_Rtc->p_RtcDriverParam->bypass)
-        tmrCtrl |= TMR_CTRL_BYP;
-
-    WRITE_UINT32(p_MemMap->tmr_ctrl, tmrCtrl);
-
-     for (i=0; i < FM_RTC_NUM_OF_ALARMS; i++)
-    {
-        /* Clear TMR_ALARM registers */
-        WRITE_UINT32(p_MemMap->tmr_alarm[i].tmr_alarm_l, 0xFFFFFFFF);
-        WRITE_UINT32(p_MemMap->tmr_alarm[i].tmr_alarm_h, 0xFFFFFFFF);
-    }
-
-    /* Clear TMR_TEVENT */
-    WRITE_UINT32(p_MemMap->tmr_tevent, TMR_TEVENT_ALL);
-
-    /* Initialize TMR_TEMASK */
-    WRITE_UINT32(p_MemMap->tmr_temask, 0);
-
 
     /* find source clock frequency in Mhz */
-    if (p_Rtc->p_RtcDriverParam->srcClk != e_FM_RTC_SOURCE_CLOCK_SYSTEM)
-         p_Rtc->srcClkFreqMhz = p_Rtc->p_RtcDriverParam->extSrcClkFreq;
+    if (p_Rtc->p_RtcDriverParam->src_clk != E_FMAN_RTC_SOURCE_CLOCK_SYSTEM)
+         p_Rtc->srcClkFreqMhz = p_Rtc->p_RtcDriverParam->ext_src_clk_freq;
     else
         p_Rtc->srcClkFreqMhz = (uint32_t)(FmGetClockFreq(p_Rtc->h_Fm)/2);
 
     /* if timer in Master mode Initialize TMR_CTRL */
     /* We want the counter (TMR_CNT) to count in nano-seconds */
-    if (!p_RtcDriverParam->timerSlaveMode && p_Rtc->p_RtcDriverParam->bypass)
-    {
+    if (!p_RtcDriverParam->timer_slave_mode && p_Rtc->p_RtcDriverParam->bypass)
         p_Rtc->clockPeriodNanoSec = (1000 / p_Rtc->srcClkFreqMhz);
-    }
     else
     {
         /* Initialize TMR_ADD with the initial frequency compensation value:
            freqCompensation = (2^32 / frequency ratio) */
         /* frequency ratio = sorce clock/rtc clock =
          * (p_Rtc->srcClkFreqMhz*1000000))/ 1/(p_Rtc->clockPeriodNanoSec * 1000000000) */
+        init_freq_comp = TRUE;
         freqCompensation = (uint32_t)DIV_CEIL(ACCUMULATOR_OVERFLOW * 1000,
-                                    p_Rtc->clockPeriodNanoSec * p_Rtc->srcClkFreqMhz);
-        WRITE_UINT32(p_MemMap->tmr_add, freqCompensation);
+                                              p_Rtc->clockPeriodNanoSec * p_Rtc->srcClkFreqMhz);
     }
+
     /* check the legality of the relation between source and destination clocks */
     /* should be larger than 1.0001 */
     tmpDouble = 10000 * (uint64_t)p_Rtc->clockPeriodNanoSec * (uint64_t)p_Rtc->srcClkFreqMhz;
@@ -316,17 +235,14 @@ t_Error FM_RTC_Init(t_Handle h_FmRtc)
         RETURN_ERROR(MAJOR, E_CONFLICT,
               ("Invalid relation between source and destination clocks. Should be larger than 1.0001"));
 
-
-    for (i=0; i < 2; i++)
-        /* Clear TMR_FIPER registers */
-        WRITE_UINT32(p_MemMap->tmr_fiper[i], 0xFFFFFFFF);
-
-    /* Initialize TMR_PRSC */
-    WRITE_UINT32(p_MemMap->tmr_prsc, p_Rtc->outputClockDivisor);
-
-    /* Clear TMR_OFF */
-    WRITE_UINT32(p_MemMap->tmr_off_l, 0);
-    WRITE_UINT32(p_MemMap->tmr_off_h, 0);
+    fman_rtc_init(p_RtcDriverParam,
+             p_MemMap,
+             FM_RTC_NUM_OF_ALARMS,
+             FM_RTC_NUM_OF_PERIODIC_PULSES,
+             FM_RTC_NUM_OF_EXT_TRIGGERS,
+             init_freq_comp,
+             freqCompensation,
+             p_Rtc->outputClockDivisor);
 
     /* Register the FM RTC interrupt */
     FmRegisterIntr(p_Rtc->h_Fm, e_FM_MOD_TMR, 0, e_FM_INTR_TYPE_NORMAL, RtcExceptions , p_Rtc);
@@ -371,9 +287,9 @@ t_Error FM_RTC_ConfigSourceClock(t_Handle         h_FmRtc,
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    p_Rtc->p_RtcDriverParam->srcClk = srcClk;
+    p_Rtc->p_RtcDriverParam->src_clk = (enum fman_src_clock)srcClk;
     if (srcClk != e_FM_RTC_SOURCE_CLOCK_SYSTEM)
-        p_Rtc->p_RtcDriverParam->extSrcClkFreq = freqInMhz;
+        p_Rtc->p_RtcDriverParam->ext_src_clk_freq = freqInMhz;
 
     return E_OK;
 }
@@ -412,7 +328,7 @@ t_Error FM_RTC_ConfigInvertedInputClockPhase(t_Handle h_FmRtc, bool inverted)
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    p_Rtc->p_RtcDriverParam->invertInputClkPhase = inverted;
+    p_Rtc->p_RtcDriverParam->invert_input_clk_phase = inverted;
 
     return E_OK;
 }
@@ -425,7 +341,7 @@ t_Error FM_RTC_ConfigInvertedOutputClockPhase(t_Handle h_FmRtc, bool inverted)
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    p_Rtc->p_RtcDriverParam->invertOutputClkPhase = inverted;
+    p_Rtc->p_RtcDriverParam->invert_output_clk_phase = inverted;
 
     return E_OK;
 }
@@ -451,7 +367,7 @@ t_Error FM_RTC_ConfigPulseRealignment(t_Handle h_FmRtc, bool enable)
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    p_Rtc->p_RtcDriverParam->pulseRealign = enable;
+    p_Rtc->p_RtcDriverParam->pulse_realign = enable;
 
     return E_OK;
 }
@@ -467,11 +383,10 @@ t_Error FM_RTC_ConfigAlarmPolarity(t_Handle             h_FmRtc,
     SANITY_CHECK_RETURN_ERROR(p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
     if (alarmId >= FM_RTC_NUM_OF_ALARMS)
-    {
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm ID"));
-    }
 
-    p_Rtc->p_RtcDriverParam->alarmPolarity[alarmId] = alarmPolarity;
+    p_Rtc->p_RtcDriverParam->alarm_polarity[alarmId] =
+        (enum fman_rtc_alarm_polarity)alarmPolarity;
 
     return E_OK;
 }
@@ -491,7 +406,8 @@ t_Error FM_RTC_ConfigExternalTriggerPolarity(t_Handle               h_FmRtc,
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External trigger ID"));
     }
 
-    p_Rtc->p_RtcDriverParam->triggerPolarity[triggerId] = triggerPolarity;
+    p_Rtc->p_RtcDriverParam->trigger_polarity[triggerId] =
+        (enum fman_rtc_trigger_polarity)triggerPolarity;
 
     return E_OK;
 }
@@ -500,26 +416,11 @@ t_Error FM_RTC_ConfigExternalTriggerPolarity(t_Handle               h_FmRtc,
 t_Error FM_RTC_Enable(t_Handle h_FmRtc, bool resetClock)
 {
     t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
-    uint32_t        tmrCtrl;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    tmrCtrl = GET_UINT32(p_Rtc->p_MemMap->tmr_ctrl);
-
-    /* TODO check that no timestamping MACs are working in this stage. */
-    if (resetClock)
-    {
-        WRITE_UINT32(p_Rtc->p_MemMap->tmr_ctrl, (tmrCtrl | TMR_CTRL_TMSR));
-
-        XX_UDelay(10);
-        /* Clear TMR_OFF */
-        WRITE_UINT32(p_Rtc->p_MemMap->tmr_off_l, 0);
-        WRITE_UINT32(p_Rtc->p_MemMap->tmr_off_h, 0);
-    }
-
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_ctrl, (tmrCtrl | TMR_CTRL_TE));
-
+    fman_rtc_enable(p_Rtc->p_MemMap, resetClock);
     return E_OK;
 }
 
@@ -527,15 +428,13 @@ t_Error FM_RTC_Enable(t_Handle h_FmRtc, bool resetClock)
 t_Error FM_RTC_Disable(t_Handle h_FmRtc)
 {
     t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
-    uint32_t        tmrCtrl;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
     /* TODO A check must be added here, that no timestamping MAC's
      * are working in this stage. */
-    tmrCtrl = GET_UINT32(p_Rtc->p_MemMap->tmr_ctrl);
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_ctrl, (tmrCtrl & ~(TMR_CTRL_TE)));
+    fman_rtc_disable(p_Rtc->p_MemMap);
 
     return E_OK;
 }
@@ -548,10 +447,7 @@ t_Error FM_RTC_SetClockOffset(t_Handle h_FmRtc, int64_t offset)
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    /* TMR_OFF_L must be written first */
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_off_l, (uint32_t)offset);
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_off_h, (uint32_t)(offset >> 32));
-
+    fman_rtc_set_timer_offset(p_Rtc->p_MemMap, offset);
     return E_OK;
 }
 
@@ -559,15 +455,12 @@ t_Error FM_RTC_SetClockOffset(t_Handle h_FmRtc, int64_t offset)
 t_Error FM_RTC_SetAlarm(t_Handle h_FmRtc, t_FmRtcAlarmParams *p_FmRtcAlarmParams)
 {
     t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
-    t_FmRtcMemMap   *p_MemMap;
-    uint32_t        tmpReg;
     uint64_t        tmpAlarm;
+    bool            enable = FALSE;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    p_MemMap = p_Rtc->p_MemMap;
-
     if (p_FmRtcAlarmParams->alarmId >= FM_RTC_NUM_OF_ALARMS)
     {
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm ID"));
@@ -579,23 +472,15 @@ t_Error FM_RTC_SetAlarm(t_Handle h_FmRtc, t_FmRtcAlarmParams *p_FmRtcAlarmParams
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Alarm time must be a multiple of RTC period - %d nanoseconds", p_Rtc->clockPeriodNanoSec));
     tmpAlarm = p_FmRtcAlarmParams->alarmTime/(uint64_t)p_Rtc->clockPeriodNanoSec;
 
-    /* TMR_ALARM_L must be written first */
-    WRITE_UINT32(p_MemMap->tmr_alarm[p_FmRtcAlarmParams->alarmId].tmr_alarm_l, (uint32_t)tmpAlarm);
-    WRITE_UINT32(p_MemMap->tmr_alarm[p_FmRtcAlarmParams->alarmId].tmr_alarm_h,
-                 (uint32_t)(tmpAlarm >> 32));
-
     if (p_FmRtcAlarmParams->f_AlarmCallback)
     {
         p_Rtc->alarmParams[p_FmRtcAlarmParams->alarmId].f_AlarmCallback = p_FmRtcAlarmParams->f_AlarmCallback;
         p_Rtc->alarmParams[p_FmRtcAlarmParams->alarmId].clearOnExpiration = p_FmRtcAlarmParams->clearOnExpiration;
-
-        if (p_FmRtcAlarmParams->alarmId == 0)
-            tmpReg = TMR_TEVENT_ALM1;
-        else
-            tmpReg = TMR_TEVENT_ALM2;
-        WRITE_UINT32(p_MemMap->tmr_temask, GET_UINT32(p_MemMap->tmr_temask) | tmpReg);
+        enable = TRUE;
     }
 
+    fman_rtc_set_alarm(p_Rtc->p_MemMap, p_FmRtcAlarmParams->alarmId, (unsigned long)tmpAlarm, enable);
+
     return E_OK;
 }
 
@@ -603,20 +488,17 @@ t_Error FM_RTC_SetAlarm(t_Handle h_FmRtc, t_FmRtcAlarmParams *p_FmRtcAlarmParams
 t_Error FM_RTC_SetPeriodicPulse(t_Handle h_FmRtc, t_FmRtcPeriodicPulseParams *p_FmRtcPeriodicPulseParams)
 {
     t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
-    t_FmRtcMemMap   *p_MemMap;
-    uint32_t        tmpReg;
+    bool            enable = FALSE;
     uint64_t        tmpFiper;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    p_MemMap = p_Rtc->p_MemMap;
-
     if (p_FmRtcPeriodicPulseParams->periodicPulseId >= FM_RTC_NUM_OF_PERIODIC_PULSES)
     {
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Periodic pulse ID"));
     }
-    if (GET_UINT32(p_MemMap->tmr_ctrl) & TMR_CTRL_TE)
+    if (fman_rtc_is_enabled(p_Rtc->p_MemMap))
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Can't set Periodic pulse when RTC is enabled."));
     if (p_FmRtcPeriodicPulseParams->periodicPulsePeriod < p_Rtc->clockPeriodNanoSec)
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Periodic pulse must be equal or larger than RTC period - %d nanoseconds", p_Rtc->clockPeriodNanoSec));
@@ -626,20 +508,13 @@ t_Error FM_RTC_SetPeriodicPulse(t_Handle h_FmRtc, t_FmRtcPeriodicPulseParams *p_
     if (tmpFiper & 0xffffffff00000000LL)
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("Periodic pulse/RTC Period must be smaller than 4294967296", p_Rtc->clockPeriodNanoSec));
 
-    WRITE_UINT32(p_MemMap->tmr_fiper[p_FmRtcPeriodicPulseParams->periodicPulseId], (uint32_t)tmpFiper);
-
     if (p_FmRtcPeriodicPulseParams->f_PeriodicPulseCallback)
     {
         p_Rtc->periodicPulseParams[p_FmRtcPeriodicPulseParams->periodicPulseId].f_PeriodicPulseCallback =
                                                                 p_FmRtcPeriodicPulseParams->f_PeriodicPulseCallback;
-
-        if (p_FmRtcPeriodicPulseParams->periodicPulseId == 0)
-            tmpReg = TMR_TEVENT_PP1;
-        else
-            tmpReg = TMR_TEVENT_PP2;
-        WRITE_UINT32(p_MemMap->tmr_temask, GET_UINT32(p_MemMap->tmr_temask) | tmpReg);
+        enable = TRUE;
     }
-
+    fman_rtc_set_periodic_pulse(p_Rtc->p_MemMap, p_FmRtcPeriodicPulseParams->periodicPulseId, (uint32_t)tmpFiper, enable);
     return E_OK;
 }
 
@@ -647,7 +522,6 @@ t_Error FM_RTC_SetPeriodicPulse(t_Handle h_FmRtc, t_FmRtcPeriodicPulseParams *p_
 t_Error FM_RTC_ClearPeriodicPulse(t_Handle h_FmRtc, uint8_t periodicPulseId)
 {
     t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
-    uint32_t    tmpReg;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
@@ -658,17 +532,7 @@ t_Error FM_RTC_ClearPeriodicPulse(t_Handle h_FmRtc, uint8_t periodicPulseId)
     }
 
     p_Rtc->periodicPulseParams[periodicPulseId].f_PeriodicPulseCallback = NULL;
-
-    if (periodicPulseId == 0)
-        tmpReg = TMR_TEVENT_PP1;
-    else
-        tmpReg = TMR_TEVENT_PP2;
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_temask, GET_UINT32(p_Rtc->p_MemMap->tmr_temask) & ~tmpReg);
-
-    if (GET_UINT32(p_Rtc->p_MemMap->tmr_ctrl) & TMR_CTRL_FS)
-        WRITE_UINT32(p_Rtc->p_MemMap->tmr_ctrl, GET_UINT32(p_Rtc->p_MemMap->tmr_ctrl) & ~TMR_CTRL_FS);
-
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_fiper[periodicPulseId], 0xFFFFFFFF);
+    fman_rtc_clear_periodic_pulse(p_Rtc->p_MemMap, periodicPulseId);
 
     return E_OK;
 }
@@ -677,7 +541,7 @@ t_Error FM_RTC_ClearPeriodicPulse(t_Handle h_FmRtc, uint8_t periodicPulseId)
 t_Error FM_RTC_SetExternalTrigger(t_Handle h_FmRtc, t_FmRtcExternalTriggerParams *p_FmRtcExternalTriggerParams)
 {
     t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
-    uint32_t    tmpReg;
+    bool        enable = FALSE;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
@@ -690,22 +554,10 @@ t_Error FM_RTC_SetExternalTrigger(t_Handle h_FmRtc, t_FmRtcExternalTriggerParams
     if (p_FmRtcExternalTriggerParams->f_ExternalTriggerCallback)
     {
         p_Rtc->externalTriggerParams[p_FmRtcExternalTriggerParams->externalTriggerId].f_ExternalTriggerCallback = p_FmRtcExternalTriggerParams->f_ExternalTriggerCallback;
-        if (p_FmRtcExternalTriggerParams->externalTriggerId == 0)
-            tmpReg = TMR_TEVENT_ETS1;
-        else
-            tmpReg = TMR_TEVENT_ETS2;
-        WRITE_UINT32(p_Rtc->p_MemMap->tmr_temask, GET_UINT32(p_Rtc->p_MemMap->tmr_temask) | tmpReg);
-    }
-
-    if (p_FmRtcExternalTriggerParams->usePulseAsInput)
-    {
-        if (p_FmRtcExternalTriggerParams->externalTriggerId == 0)
-            tmpReg = TMR_CTRL_PP1L;
-        else
-            tmpReg = TMR_CTRL_PP2L;
-        WRITE_UINT32(p_Rtc->p_MemMap->tmr_ctrl, GET_UINT32(p_Rtc->p_MemMap->tmr_ctrl) | tmpReg);
+        enable = TRUE;
     }
 
+    fman_rtc_set_ext_trigger(p_Rtc->p_MemMap, p_FmRtcExternalTriggerParams->externalTriggerId, enable, p_FmRtcExternalTriggerParams->usePulseAsInput);
     return E_OK;
 }
 
@@ -713,7 +565,6 @@ t_Error FM_RTC_SetExternalTrigger(t_Handle h_FmRtc, t_FmRtcExternalTriggerParams
 t_Error FM_RTC_ClearExternalTrigger(t_Handle h_FmRtc, uint8_t externalTriggerId)
 {
     t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
-    uint32_t    tmpReg;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
@@ -723,19 +574,7 @@ t_Error FM_RTC_ClearExternalTrigger(t_Handle h_FmRtc, uint8_t externalTriggerId)
 
     p_Rtc->externalTriggerParams[externalTriggerId].f_ExternalTriggerCallback = NULL;
 
-    if (externalTriggerId == 0)
-        tmpReg = TMR_TEVENT_ETS1;
-    else
-        tmpReg = TMR_TEVENT_ETS2;
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_temask, GET_UINT32(p_Rtc->p_MemMap->tmr_temask) & ~tmpReg);
-
-    if (externalTriggerId == 0)
-        tmpReg = TMR_CTRL_PP1L;
-    else
-        tmpReg = TMR_CTRL_PP2L;
-
-    if (GET_UINT32(p_Rtc->p_MemMap->tmr_ctrl) & tmpReg)
-        WRITE_UINT32(p_Rtc->p_MemMap->tmr_ctrl, GET_UINT32(p_Rtc->p_MemMap->tmr_ctrl) & ~tmpReg);
+    fman_rtc_clear_external_trigger(p_Rtc->p_MemMap, externalTriggerId);
 
     return E_OK;
 }
@@ -746,21 +585,14 @@ t_Error FM_RTC_GetExternalTriggerTimeStamp(t_Handle             h_FmRtc,
                                               uint64_t          *p_TimeStamp)
 {
     t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
-    uint64_t    timeStamp;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
     if (triggerId >= FM_RTC_NUM_OF_EXT_TRIGGERS)
-    {
         RETURN_ERROR(MAJOR, E_INVALID_SELECTION, ("External trigger ID"));
-    }
-
-    timeStamp = (uint64_t)GET_UINT32(p_Rtc->p_MemMap->tmr_etts[triggerId].tmr_etts_l);
-    timeStamp |= ((uint64_t)GET_UINT32(p_Rtc->p_MemMap->tmr_etts[triggerId].tmr_etts_h) << 32);
 
-    timeStamp = timeStamp*p_Rtc->clockPeriodNanoSec;
-    *p_TimeStamp = timeStamp;
+    *p_TimeStamp = fman_rtc_get_trigger_stamp(p_Rtc->p_MemMap, triggerId)*p_Rtc->clockPeriodNanoSec;
 
     return E_OK;
 }
@@ -769,18 +601,11 @@ t_Error FM_RTC_GetExternalTriggerTimeStamp(t_Handle             h_FmRtc,
 t_Error FM_RTC_GetCurrentTime(t_Handle h_FmRtc, uint64_t *p_Ts)
 {
     t_FmRtc     *p_Rtc = (t_FmRtc *)h_FmRtc;
-    uint64_t    time;
 
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    /* TMR_CNT_L must be read first to get an accurate value */
-    time = (uint64_t)GET_UINT32(p_Rtc->p_MemMap->tmr_cnt_l);
-    time |= ((uint64_t)GET_UINT32(p_Rtc->p_MemMap->tmr_cnt_h) << 32);
-
-    time = time*p_Rtc->clockPeriodNanoSec;
-
-    *p_Ts = time;
+    *p_Ts = fman_rtc_get_timer(p_Rtc->p_MemMap)*p_Rtc->clockPeriodNanoSec;
 
     return E_OK;
 }
@@ -794,9 +619,7 @@ t_Error FM_RTC_SetCurrentTime(t_Handle h_FmRtc, uint64_t ts)
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
     ts = ts/p_Rtc->clockPeriodNanoSec;
-    /* TMR_CNT_L must be written first to get an accurate value */
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_cnt_l, (uint32_t)ts);
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_cnt_h, (uint32_t)(ts >> 32));
+    fman_rtc_set_timer(p_Rtc->p_MemMap, (unsigned long)ts);
 
     return E_OK;
 }
@@ -809,7 +632,7 @@ t_Error FM_RTC_GetFreqCompensation(t_Handle h_FmRtc, uint32_t *p_Compensation)
     SANITY_CHECK_RETURN_ERROR(p_Rtc, E_INVALID_HANDLE);
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
-    *p_Compensation = GET_UINT32(p_Rtc->p_MemMap->tmr_add);
+    *p_Compensation = fman_rtc_get_frequency_compensation(p_Rtc->p_MemMap);
 
     return E_OK;
 }
@@ -823,7 +646,7 @@ t_Error FM_RTC_SetFreqCompensation(t_Handle h_FmRtc, uint32_t freqCompensation)
     SANITY_CHECK_RETURN_ERROR(!p_Rtc->p_RtcDriverParam, E_INVALID_STATE);
 
     /* set the new freqCompensation */
-    WRITE_UINT32(p_Rtc->p_MemMap->tmr_add, freqCompensation);
+    fman_rtc_set_frequency_compensation(p_Rtc->p_MemMap, freqCompensation);
 
     return E_OK;
 }
@@ -833,7 +656,7 @@ t_Error FM_RTC_SetFreqCompensation(t_Handle h_FmRtc, uint32_t freqCompensation)
 t_Error FM_RTC_DumpRegs(t_Handle h_FmRtc)
 {
     t_FmRtc         *p_Rtc = (t_FmRtc *)h_FmRtc;
-    t_FmRtcMemMap   *p_MemMap = p_Rtc->p_MemMap;
+    struct rtc_regs   *p_MemMap = p_Rtc->p_MemMap;
     int             i = 0;
 
     DECLARE_DUMP;
diff --git a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fm_rtc.h b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fm_rtc.h
index 4c1a422..843ca00 100644
--- a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fm_rtc.h
+++ b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fm_rtc.h
@@ -50,132 +50,12 @@
 
 /* General definitions */
 
-#define NANOSEC_PER_ONE_HZ_TICK         1000000000
-#define MIN_RTC_CLK_FREQ_HZ             1000
-#define MHz                             1000000
-
 #define ACCUMULATOR_OVERFLOW            ((uint64_t)(1LL << 32))
-
-/* RTC default values */
-#define DEFAULT_srcClock                e_FM_RTC_SOURCE_CLOCK_SYSTEM
-#define DEFAULT_bypass      FALSE
-#define DEFAULT_invertInputClkPhase     FALSE
-#define DEFAULT_invertOutputClkPhase    FALSE
-#define DEFAULT_outputClockDivisor      0x00000002
-#define DEFAULT_alarmPolarity           e_FM_RTC_ALARM_POLARITY_ACTIVE_HIGH
-#define DEFAULT_triggerPolarity         e_FM_RTC_TRIGGER_ON_FALLING_EDGE
-#define DEFAULT_pulseRealign            FALSE
-#define DEFAULT_clockPeriod             1000
-
-/* FM RTC Registers definitions */
-#define TMR_CTRL_ALMP1                  0x80000000
-#define TMR_CTRL_ALMP2                  0x40000000
-#define TMR_CTRL_FS                     0x10000000
-#define TMR_CTRL_PP1L                   0x08000000
-#define TMR_CTRL_PP2L                   0x04000000
-#define TMR_CTRL_TCLK_PERIOD_MASK       0x03FF0000
-#define TMR_CTRL_FRD                    0x00004000
-#define TMR_CTRL_SLV                    0x00002000
-#define TMR_CTRL_ETEP1                  0x00000100
-#define TMR_CTRL_COPH                   0x00000080
-#define TMR_CTRL_CIPH                   0x00000040
-#define TMR_CTRL_TMSR                   0x00000020
-#define TMR_CTRL_DBG                    0x00000010
-#define TMR_CTRL_BYP                    0x00000008
-#define TMR_CTRL_TE                     0x00000004
-#define TMR_CTRL_CKSEL_OSC_CLK          0x00000003
-#define TMR_CTRL_CKSEL_MAC_CLK          0x00000001
-#define TMR_CTRL_CKSEL_EXT_CLK          0x00000000
-#define TMR_CTRL_TCLK_PERIOD_SHIFT      16
-
-#define TMR_TEVENT_ETS2                 0x02000000
-#define TMR_TEVENT_ETS1                 0x01000000
-#define TMR_TEVENT_ALM2                 0x00020000
-#define TMR_TEVENT_ALM1                 0x00010000
-#define TMR_TEVENT_PP1                  0x00000080
-#define TMR_TEVENT_PP2                  0x00000040
-#define TMR_TEVENT_PP3                  0x00000020
-#define TMR_TEVENT_ALL                  (TMR_TEVENT_ETS2 | TMR_TEVENT_ETS1 | \
-                                         TMR_TEVENT_ALM2 | TMR_TEVENT_ALM1 | \
-                                         TMR_TEVENT_PP1 | TMR_TEVENT_PP2 | TMR_TEVENT_PP3)
-
-#define TMR_PRSC_OCK_MASK               0x0000FFFF
-
-
-/**************************************************************************//**
- @Description       Memory Mapped Registers
-*//***************************************************************************/
-
-#if defined(__MWERKS__) && !defined(__GNUC__)
-#pragma pack(push,1)
-#endif /* defined(__MWERKS__) && ... */
-
-/**************************************************************************//**
- @Description FM RTC timer alarm
-*//***************************************************************************/
-typedef _Packed struct t_TmrAlaram
-{
-    volatile uint32_t   tmr_alarm_h;    /**<  */
-    volatile uint32_t   tmr_alarm_l;    /**<  */
-} _PackedType t_TmrAlaram;
-
-/**************************************************************************//**
- @Description FM RTC timer Ex trigger
-*//***************************************************************************/
-typedef _Packed struct t_TmrExtTrigger
-{
-    volatile uint32_t   tmr_etts_h;     /**<  */
-    volatile uint32_t   tmr_etts_l;     /**<  */
-} _PackedType t_TmrExtTrigger;
-
-typedef _Packed struct
-{
-    volatile uint32_t tmr_id;      /* Module ID and version register */
-    volatile uint32_t tmr_id2;     /* Module ID and configuration register */
-    volatile uint32_t PTP_RESERVED1[30];
-    volatile uint32_t tmr_ctrl;    /* timer control register */
-    volatile uint32_t tmr_tevent;  /* timer event register */
-    volatile uint32_t tmr_temask;  /* timer event mask register */
-    volatile uint32_t PTP_RESERVED2[3];
-    volatile uint32_t tmr_cnt_h;   /* timer counter high register */
-    volatile uint32_t tmr_cnt_l;   /* timer counter low register */
-    volatile uint32_t tmr_add;     /* timer drift compensation addend register */
-    volatile uint32_t tmr_acc;     /* timer accumulator register */
-    volatile uint32_t tmr_prsc;    /* timer prescale */
-    volatile uint32_t PTP_RESERVED3;
-    volatile uint32_t tmr_off_h;    /* timer offset high */
-    volatile uint32_t tmr_off_l;    /* timer offset low  */
-    volatile t_TmrAlaram tmr_alarm[FM_RTC_NUM_OF_ALARMS]; /* timer alarm */
-    volatile uint32_t PTP_RESERVED4[2];
-    volatile uint32_t tmr_fiper[FM_RTC_NUM_OF_PERIODIC_PULSES]; /* timer fixed period interval */
-    volatile uint32_t PTP_RESERVED5[2];
-    volatile t_TmrExtTrigger tmr_etts[FM_RTC_NUM_OF_EXT_TRIGGERS]; /*time stamp general purpose external */
-    volatile uint32_t PTP_RESERVED6[3];
-} _PackedType t_FmRtcMemMap;
-
-#if defined(__MWERKS__) && !defined(__GNUC__)
-#pragma pack(pop)
-#endif /* defined(__MWERKS__) && ... */
+#define DEFAULT_OUTPUT_CLOCK_DIVISOR     0x00000002
+#define DEFAULT_BYPASS      			 FALSE
+#define DEFAULT_CLOCK_PERIOD             1000
 
 
-/**************************************************************************//**
- @Description   RTC FM driver parameters structure.
-*//***************************************************************************/
-typedef struct t_FmRtcDriverParam
-{
-    t_Handle                h_Fm;                   /**<  */
-    e_FmSrcClk              srcClk;               /**<  */
-    uint32_t                extSrcClkFreq;         /**<  */
-    uint32_t                rtcFreqHz;              /**<  */
-    bool                    timerSlaveMode;         /*Slave/Master Mode*/
-    bool                    invertInputClkPhase;
-    bool                    invertOutputClkPhase;
-    uint32_t                eventsMask;
-    bool                    bypass; /**< Indicates if frequency compensation is bypassed */
-    bool                    pulseRealign;
-    e_FmRtcAlarmPolarity    alarmPolarity[FM_RTC_NUM_OF_ALARMS];
-    e_FmRtcTriggerPolarity  triggerPolarity[FM_RTC_NUM_OF_EXT_TRIGGERS];
-} t_FmRtcDriverParam;
 
 typedef struct t_FmRtcAlarm
 {
@@ -202,14 +82,14 @@ typedef struct t_FmRtc
     t_Part                  *p_Part;            /**< Pointer to the integration device              */
     t_Handle                h_Fm;
     t_Handle                h_App;              /**< Application handle */
-    t_FmRtcMemMap           *p_MemMap;          /**< Pointer to RTC memory map */
+    struct rtc_regs			*p_MemMap;
     uint32_t                clockPeriodNanoSec; /**< RTC clock period in nano-seconds (for FS mode) */
     uint32_t                srcClkFreqMhz;
     uint16_t                outputClockDivisor; /**< Output clock divisor (for FS mode) */
     t_FmRtcAlarm            alarmParams[FM_RTC_NUM_OF_ALARMS];
     t_FmRtcPeriodicPulse    periodicPulseParams[FM_RTC_NUM_OF_PERIODIC_PULSES];
     t_FmRtcExternalTrigger  externalTriggerParams[FM_RTC_NUM_OF_EXT_TRIGGERS];
-    t_FmRtcDriverParam      *p_RtcDriverParam;  /**< RTC Driver parameters (for Init phase) */
+    struct rtc_cfg 			*p_RtcDriverParam;  /**< RTC Driver parameters (for Init phase) */
 } t_FmRtc;
 
 
diff --git a/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fman_rtc.c b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fman_rtc.c
new file mode 100755
index 0000000..acdf507
--- /dev/null
+++ b/drivers/net/ethernet/freescale/fman/Peripherals/FM/Rtc/fman_rtc.c
@@ -0,0 +1,334 @@
+/*
+ * Copyright 2008-2013 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "fsl_fman_rtc.h"
+
+void fman_rtc_defconfig(struct rtc_cfg *cfg)
+{
+	int i;
+	cfg->src_clk = DEFAULT_SRC_CLOCK;
+	cfg->invert_input_clk_phase = DEFAULT_INVERT_INPUT_CLK_PHASE;
+	cfg->invert_output_clk_phase = DEFAULT_INVERT_OUTPUT_CLK_PHASE;
+	cfg->pulse_realign = DEFAULT_PULSE_REALIGN;
+	for (i = 0; i < FMAN_RTC_MAX_NUM_OF_ALARMS; i++)
+		cfg->alarm_polarity[i] = DEFAULT_ALARM_POLARITY;
+	for (i = 0; i < FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS; i++)
+		cfg->trigger_polarity[i] = DEFAULT_TRIGGER_POLARITY;
+}
+
+uint32_t fman_rtc_get_events(struct rtc_regs *regs)
+{
+	return ioread32be(&regs->tmr_tevent);
+}
+
+uint32_t fman_rtc_get_event(struct rtc_regs *regs, uint32_t ev_mask)
+{
+	return ioread32be(&regs->tmr_tevent) & ev_mask;
+}
+
+uint32_t fman_rtc_get_interrupt_mask(struct rtc_regs *regs)
+{
+	return ioread32be(&regs->tmr_temask);
+}
+
+void fman_rtc_set_interrupt_mask(struct rtc_regs *regs, uint32_t mask)
+{
+	iowrite32be(mask, &regs->tmr_temask);
+}
+
+void fman_rtc_ack_event(struct rtc_regs *regs, uint32_t events)
+{
+	iowrite32be(events, &regs->tmr_tevent);
+}
+
+uint32_t fman_rtc_check_and_clear_event(struct rtc_regs *regs)
+{
+	uint32_t event;
+
+	event = ioread32be(&regs->tmr_tevent);
+	event &= ioread32be(&regs->tmr_temask);
+
+	if (event)
+		iowrite32be(event, &regs->tmr_tevent);
+	return event;
+}
+
+uint32_t fman_rtc_get_frequency_compensation(struct rtc_regs *regs)
+{
+	return ioread32be(&regs->tmr_add);
+}
+
+void fman_rtc_set_frequency_compensation(struct rtc_regs *regs, uint32_t val)
+{
+	iowrite32be(val, &regs->tmr_add);
+}
+
+void fman_rtc_enable_interupt(struct rtc_regs *regs, uint32_t events)
+{
+	fman_rtc_set_interrupt_mask(regs, fman_rtc_get_interrupt_mask(regs) | events);
+}
+
+void fman_rtc_disable_interupt(struct rtc_regs *regs, uint32_t events)
+{
+	fman_rtc_set_interrupt_mask(regs, fman_rtc_get_interrupt_mask(regs) & ~events);
+}
+
+void fman_rtc_set_timer_alarm_l(struct rtc_regs *regs, int index, uint32_t val)
+{
+	iowrite32be(val, &regs->tmr_alarm[index].tmr_alarm_l);
+}
+
+void fman_rtc_set_timer_fiper(struct rtc_regs *regs, int index, uint32_t val)
+{
+	iowrite32be(val, &regs->tmr_fiper[index]);
+}
+
+void fman_rtc_set_timer_alarm(struct rtc_regs *regs, int index, int64_t val)
+{
+	iowrite32be((uint32_t)val, &regs->tmr_alarm[index].tmr_alarm_l);
+	iowrite32be((uint32_t)(val >> 32), &regs->tmr_alarm[index].tmr_alarm_h);
+}
+
+void fman_rtc_set_timer_offset(struct rtc_regs *regs, int64_t val)
+{
+	iowrite32be((uint32_t)val, &regs->tmr_off_l);
+	iowrite32be((uint32_t)(val >> 32), &regs->tmr_off_h);
+}
+
+uint64_t fman_rtc_get_trigger_stamp(struct rtc_regs *regs, int id)
+{
+	uint64_t time;
+	/* TMR_CNT_L must be read first to get an accurate value */
+	time = (uint64_t)ioread32be(&regs->tmr_etts[id].tmr_etts_l);
+	time |= ((uint64_t)ioread32be(&regs->tmr_etts[id].tmr_etts_h)
+		<< 32);
+
+	return time;
+}
+
+uint32_t fman_rtc_get_timer_ctrl(struct rtc_regs *regs)
+{
+	return ioread32be(&regs->tmr_ctrl);
+}
+
+void fman_rtc_set_timer_ctrl(struct rtc_regs *regs, uint32_t val)
+{
+	iowrite32be(val, &regs->tmr_ctrl);
+}
+
+void fman_rtc_timers_soft_reset(struct rtc_regs *regs)
+{
+	fman_rtc_set_timer_ctrl(regs, FMAN_RTC_TMR_CTRL_TMSR);
+	udelay(10);
+	fman_rtc_set_timer_ctrl(regs, 0);
+}
+
+void fman_rtc_init(struct rtc_cfg *cfg, struct rtc_regs *regs, int num_alarms,
+		int num_fipers, int num_ext_triggers, bool init_freq_comp,
+		uint32_t freq_compensation, uint32_t output_clock_divisor)
+{
+	uint32_t            tmr_ctrl;
+	int			i;
+
+	fman_rtc_timers_soft_reset(regs);
+
+	/* Set the source clock */
+	switch (cfg->src_clk) {
+	case E_FMAN_RTC_SOURCE_CLOCK_SYSTEM:
+		tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_MAC_CLK;
+		break;
+	case E_FMAN_RTC_SOURCE_CLOCK_OSCILATOR:
+		tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_OSC_CLK;
+		break;
+	default:
+		/* Use a clock from the External TMR reference clock.*/
+		tmr_ctrl = FMAN_RTC_TMR_CTRL_CKSEL_EXT_CLK;
+		break;
+	}
+
+	/* whatever period the user picked, the timestamp will advance in '1'
+	* every time the period passed. */
+	tmr_ctrl |= ((1 << FMAN_RTC_TMR_CTRL_TCLK_PERIOD_SHIFT) &
+				FMAN_RTC_TMR_CTRL_TCLK_PERIOD_MASK);
+
+	if (cfg->invert_input_clk_phase)
+		tmr_ctrl |= FMAN_RTC_TMR_CTRL_CIPH;
+	if (cfg->invert_output_clk_phase)
+		tmr_ctrl |= FMAN_RTC_TMR_CTRL_COPH;
+
+	for (i = 0; i < num_alarms; i++) {
+		if (cfg->alarm_polarity[i] ==
+			E_FMAN_RTC_ALARM_POLARITY_ACTIVE_LOW)
+			tmr_ctrl |= (FMAN_RTC_TMR_CTRL_ALMP1 >> i);
+	}
+
+	for (i = 0; i < num_ext_triggers; i++)
+		if (cfg->trigger_polarity[i] ==
+			E_FMAN_RTC_TRIGGER_ON_FALLING_EDGE)
+			tmr_ctrl |= (FMAN_RTC_TMR_CTRL_ETEP1 << i);
+
+	if (!cfg->timer_slave_mode && cfg->bypass)
+		tmr_ctrl |= FMAN_RTC_TMR_CTRL_BYP;
+
+	fman_rtc_set_timer_ctrl(regs, tmr_ctrl);
+	if (init_freq_comp)
+		fman_rtc_set_frequency_compensation(regs, freq_compensation);
+
+	/* Clear TMR_ALARM registers */
+	for (i = 0; i < num_alarms; i++)
+		fman_rtc_set_timer_alarm(regs, i, 0xFFFFFFFFFFFFFFFFLL);
+
+	/* Clear TMR_TEVENT */
+	fman_rtc_ack_event(regs, FMAN_RTC_TMR_TEVENT_ALL);
+
+	/* Initialize TMR_TEMASK */
+	fman_rtc_set_interrupt_mask(regs, 0);
+
+	/* Clear TMR_FIPER registers */
+	for (i = 0; i < num_fipers; i++)
+		fman_rtc_set_timer_fiper(regs, i, 0xFFFFFFFF);
+
+	/* Initialize TMR_PRSC */
+	iowrite32be(output_clock_divisor, &regs->tmr_prsc);
+
+	/* Clear TMR_OFF */
+	fman_rtc_set_timer_offset(regs, 0);
+}
+
+bool fman_rtc_is_enabled(struct rtc_regs *regs)
+{
+	return (bool)(fman_rtc_get_timer_ctrl(regs) & FMAN_RTC_TMR_CTRL_TE);
+}
+
+void fman_rtc_enable(struct rtc_regs *regs, bool reset_clock)
+{
+	uint32_t tmr_ctrl = fman_rtc_get_timer_ctrl(regs);
+
+	/* TODO check that no timestamping MACs are working in this stage. */
+	if (reset_clock) {
+		fman_rtc_set_timer_ctrl(regs, (tmr_ctrl | FMAN_RTC_TMR_CTRL_TMSR));
+
+		udelay(10);
+		/* Clear TMR_OFF */
+		fman_rtc_set_timer_offset(regs, 0);
+	}
+
+	fman_rtc_set_timer_ctrl(regs, (tmr_ctrl | FMAN_RTC_TMR_CTRL_TE));
+}
+
+void fman_rtc_disable(struct rtc_regs *regs)
+{
+	fman_rtc_set_timer_ctrl(regs, (fman_rtc_get_timer_ctrl(regs)
+					& ~(FMAN_RTC_TMR_CTRL_TE)));
+}
+
+void fman_rtc_clear_periodic_pulse(struct rtc_regs *regs, int id)
+{
+	uint32_t tmp_reg;
+	if (id == 0)
+		tmp_reg = FMAN_RTC_TMR_TEVENT_PP1;
+	else
+		tmp_reg = FMAN_RTC_TMR_TEVENT_PP2;
+	fman_rtc_disable_interupt(regs, tmp_reg);
+
+	tmp_reg = fman_rtc_get_timer_ctrl(regs);
+	if (tmp_reg & FMAN_RTC_TMR_CTRL_FS)
+		fman_rtc_set_timer_ctrl(regs, tmp_reg & ~FMAN_RTC_TMR_CTRL_FS);
+
+	fman_rtc_set_timer_fiper(regs, id, 0xFFFFFFFF);
+}
+
+void fman_rtc_clear_external_trigger(struct rtc_regs *regs, int id)
+{
+	uint32_t    tmpReg, tmp_ctrl;
+
+	if (id == 0)
+		tmpReg = FMAN_RTC_TMR_TEVENT_ETS1;
+	else
+		tmpReg = FMAN_RTC_TMR_TEVENT_ETS2;
+	fman_rtc_disable_interupt(regs, tmpReg);
+
+	if (id == 0)
+		tmpReg = FMAN_RTC_TMR_CTRL_PP1L;
+	else
+		tmpReg = FMAN_RTC_TMR_CTRL_PP2L;
+	tmp_ctrl = fman_rtc_get_timer_ctrl(regs);
+	if (tmp_ctrl & tmpReg)
+		fman_rtc_set_timer_ctrl(regs, tmp_ctrl & ~tmpReg);
+}
+
+void fman_rtc_set_alarm(struct rtc_regs *regs, int id, uint32_t val, bool enable)
+{
+	uint32_t    tmpReg;
+	fman_rtc_set_timer_alarm(regs, id, val);
+	if (enable) {
+		if (id == 0)
+			tmpReg = FMAN_RTC_TMR_TEVENT_ALM1;
+		else
+			tmpReg = FMAN_RTC_TMR_TEVENT_ALM2;
+		fman_rtc_enable_interupt(regs, tmpReg);
+	}
+}
+
+void fman_rtc_set_periodic_pulse(struct rtc_regs *regs, int id, uint32_t val,
+						bool enable)
+{
+	uint32_t    tmpReg;
+	fman_rtc_set_timer_fiper(regs, id, val);
+	if (enable) {
+		if (id == 0)
+			tmpReg = FMAN_RTC_TMR_TEVENT_PP1;
+		else
+			tmpReg = FMAN_RTC_TMR_TEVENT_PP2;
+		fman_rtc_enable_interupt(regs, tmpReg);
+	}
+}
+
+void fman_rtc_set_ext_trigger(struct rtc_regs *regs, int id, bool enable,
+						bool use_pulse_as_input)
+{
+	uint32_t    tmpReg;
+	if (enable) {
+		if (id == 0)
+			tmpReg = FMAN_RTC_TMR_TEVENT_ETS1;
+		else
+			tmpReg = FMAN_RTC_TMR_TEVENT_ETS2;
+		fman_rtc_enable_interupt(regs, tmpReg);
+	}
+	if (use_pulse_as_input)	{
+		if (id == 0)
+			tmpReg = FMAN_RTC_TMR_CTRL_PP1L;
+		else
+			tmpReg = FMAN_RTC_TMR_CTRL_PP2L;
+		fman_rtc_set_timer_ctrl(regs, fman_rtc_get_timer_ctrl(regs) | tmpReg);
+	}
+}