diff options
| author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2014-12-09 09:10:28 (GMT) |
|---|---|---|
| committer | Honghua Yin <Hong-Hua.Yin@freescale.com> | 2015-03-23 03:29:54 (GMT) |
| commit | c628372c2c1c7b913b8e611aa4e859fefcd1202f (patch) | |
| tree | e34ac004800809c3cfaac336449a932d62e80165 /drivers/net/ethernet/freescale/fman/Peripherals | |
| parent | 9e92943c8dd782b17d7523bd664e6813654dee98 (diff) | |
| download | linux-fsl-qoriq-c628372c2c1c7b913b8e611aa4e859fefcd1202f.tar.xz | |
fsl/dpa: fixup to support 2.5G SGMII
- correct the location of disabling auto-neg for 2.5G in SetupSgmiiInternalPhy.
- add the missing condition e_ENET_MODE_SGMII_2500 in memac_init_phy.
- fix sgmii_2500 to sgmii-2500 to match u-boot.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: I3e3481f1a22e0931acaaaf739dccce944e91e76c
Reviewed-on: http://git.am.freescale.net:8181/25752
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
Reviewed-by: Honghua Yin <Hong-Hua.Yin@freescale.com>
Diffstat (limited to 'drivers/net/ethernet/freescale/fman/Peripherals')
| -rw-r--r-- | drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/memac.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/memac.c b/drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/memac.c index 8782ad2..34eefb9 100644 --- a/drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/memac.c +++ b/drivers/net/ethernet/freescale/fman/Peripherals/FM/MAC/memac.c @@ -89,12 +89,13 @@ static void SetupSgmiiInternalPhy(t_Memac *p_Memac, uint8_t phyAddr) speed=10000 is provided for SGMII ports. Temporary modify enet mode to 1G one, so MII functions can work correctly. */ enetMode = p_Memac->enetMode; - p_Memac->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Memac->enetMode), e_ENET_SPEED_1000); /* SGMII mode + AN enable */ tmpReg16 = PHY_SGMII_IF_MODE_AN | PHY_SGMII_IF_MODE_SGMII; if ((p_Memac->enetMode) == e_ENET_MODE_SGMII_2500) tmpReg16 = PHY_SGMII_CR_PHY_RESET | PHY_SGMII_IF_MODE_SGMII; + + p_Memac->enetMode = MAKE_ENET_MODE(ENET_INTERFACE_FROM_MODE(p_Memac->enetMode), e_ENET_SPEED_1000); MEMAC_MII_WritePhyReg(p_Memac, phyAddr, 0x14, tmpReg16); /* Device ability according to SGMII specification */ |