diff options
| author | Claudiu Manoil <claudiu.manoil@freescale.com> | 2014-03-24 09:53:41 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:37:54 (GMT) |
| commit | ceface9cf7e94849abcab857b99fea268493bbde (patch) | |
| tree | cdfd76a3abd96e1f47bf44c701d805b09961f6b7 /drivers/net/ethernet/freescale/fsl_pq_mdio.c | |
| parent | c4d7b520ecc87adf139fdb2dec057447baa6b8e0 (diff) | |
| download | linux-fsl-qoriq-ceface9cf7e94849abcab857b99fea268493bbde.tar.xz | |
net/fsl_pq_mdio: Use ioread/iowrite32be() portable accessors
in_be32()/out_be32() are not defined by ARM.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
---
Cherry-picked from commit: f5bbd262e70ff2355ce4284b0ad9eaf93fb5e374
---
Change-Id: I0da4e74026f112181299880744dc1ccef474a9dc
Reviewed-on: http://git.am.freescale.net:8181/21166
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'drivers/net/ethernet/freescale/fsl_pq_mdio.c')
| -rw-r--r-- | drivers/net/ethernet/freescale/fsl_pq_mdio.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/net/ethernet/freescale/fsl_pq_mdio.c b/drivers/net/ethernet/freescale/fsl_pq_mdio.c index dd5d405b..7704046 100644 --- a/drivers/net/ethernet/freescale/fsl_pq_mdio.c +++ b/drivers/net/ethernet/freescale/fsl_pq_mdio.c @@ -106,14 +106,14 @@ static int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u32 status; /* Set the PHY address and the register address we want to write */ - out_be32(®s->miimadd, (mii_id << 8) | regnum); + iowrite32be((mii_id << 8) | regnum, ®s->miimadd); /* Write out the value we want */ - out_be32(®s->miimcon, value); + iowrite32be(value, ®s->miimcon); /* Wait for the transaction to finish */ - status = spin_event_timeout(!(in_be32(®s->miimind) & MIIMIND_BUSY), - MII_TIMEOUT, 0); + status = spin_event_timeout(!(ioread32be(®s->miimind) & + MIIMIND_BUSY), MII_TIMEOUT, 0); return status ? 0 : -ETIMEDOUT; } @@ -136,21 +136,21 @@ static int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum) u16 value; /* Set the PHY address and the register address we want to read */ - out_be32(®s->miimadd, (mii_id << 8) | regnum); + iowrite32be((mii_id << 8) | regnum, ®s->miimadd); /* Clear miimcom, and then initiate a read */ - out_be32(®s->miimcom, 0); - out_be32(®s->miimcom, MII_READ_COMMAND); + iowrite32be(0, ®s->miimcom); + iowrite32be(MII_READ_COMMAND, ®s->miimcom); /* Wait for the transaction to finish, normally less than 100us */ - status = spin_event_timeout(!(in_be32(®s->miimind) & + status = spin_event_timeout(!(ioread32be(®s->miimind) & (MIIMIND_NOTVALID | MIIMIND_BUSY)), MII_TIMEOUT, 0); if (!status) return -ETIMEDOUT; /* Grab the value of the register from miimstat */ - value = in_be32(®s->miimstat); + value = ioread32be(®s->miimstat); dev_dbg(&bus->dev, "read %04x from address %x/%x\n", value, mii_id, regnum); return value; @@ -166,14 +166,14 @@ static int fsl_pq_mdio_reset(struct mii_bus *bus) mutex_lock(&bus->mdio_lock); /* Reset the management interface */ - out_be32(®s->miimcfg, MIIMCFG_RESET); + iowrite32be(MIIMCFG_RESET, ®s->miimcfg); /* Setup the MII Mgmt clock speed */ - out_be32(®s->miimcfg, MIIMCFG_INIT_VALUE); + iowrite32be(MIIMCFG_INIT_VALUE, ®s->miimcfg); /* Wait until the bus is free */ - status = spin_event_timeout(!(in_be32(®s->miimind) & MIIMIND_BUSY), - MII_TIMEOUT, 0); + status = spin_event_timeout(!(ioread32be(®s->miimind) & + MIIMIND_BUSY), MII_TIMEOUT, 0); mutex_unlock(&bus->mdio_lock); @@ -434,7 +434,7 @@ static int fsl_pq_mdio_probe(struct platform_device *pdev) tbipa = data->get_tbipa(priv->map); - out_be32(tbipa, be32_to_cpup(prop)); + iowrite32be(be32_to_cpup(prop), tbipa); } } |