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| author | Claudiu Manoil <claudiu.manoil@freescale.com> | 2014-10-01 15:11:40 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:37:58 (GMT) |
| commit | 5481b9b61ad7b09fdc9426e62b9040a3978d50bc (patch) | |
| tree | 430dcc865055db3324c61efce50e0e70f1c77e45 /drivers/net/ethernet/freescale/gianfar.c | |
| parent | 8c8e0182d2ac7aa4e8fb9424414788db935648cd (diff) | |
| download | linux-fsl-qoriq-5481b9b61ad7b09fdc9426e62b9040a3978d50bc.tar.xz | |
gianfar: Exclude SRAM alloc from non-PPC (ARM)
Allocation of Buffer Descriptors to SRAM is not supported
by the ARM based LS1 platform. The CACHE_SRAM feature is
PPC specific (mpc85xx SoC family more exactly). The mpc85xx
CACHE_SRAM driver lies in the PPC architecture folders, so
the API calls in gianfar must be excluded from non-PPC builds,
otherwise obviously there will be compile errors on ARM (LS1).
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Change-Id: I5594ec8fd104794d183426b973d35309d44b64e2
Reviewed-on: http://git.am.freescale.net:8181/21173
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'drivers/net/ethernet/freescale/gianfar.c')
| -rw-r--r-- | drivers/net/ethernet/freescale/gianfar.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 798cb3f..1f14020 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c @@ -165,10 +165,12 @@ static void gfar_set_mac_for_addr(struct net_device *dev, int num, const u8 *addr); static int gfar_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); +#ifdef CONFIG_FSL_85XX_CACHE_SRAM bool gfar_l2sram_en = true; module_param(gfar_l2sram_en, bool, 0444); MODULE_PARM_DESC(gfar_l2sram_en, "Enable allocation to L2 SRAM."); +#endif MODULE_AUTHOR("Freescale Semiconductor, Inc"); MODULE_DESCRIPTION("Gianfar Ethernet Driver"); @@ -244,7 +246,6 @@ static int gfar_alloc_skb_resources(struct net_device *ndev) { void *vaddr = NULL; dma_addr_t addr; - phys_addr_t paddr; int i, j, k; struct gfar_private *priv = netdev_priv(ndev); struct device *dev = priv->dev; @@ -260,7 +261,9 @@ static int gfar_alloc_skb_resources(struct net_device *ndev) priv->total_rx_ring_size += priv->rx_queue[i]->rx_ring_size; /* Allocate memory for the buffer descriptors */ +#ifdef CONFIG_FSL_85XX_CACHE_SRAM if (priv->bd_l2sram_en) { + phys_addr_t paddr; vaddr = mpc85xx_cache_sram_alloc(BD_RING_REG_SZ(priv), &paddr, L1_CACHE_BYTES); if (vaddr) @@ -272,6 +275,7 @@ static int gfar_alloc_skb_resources(struct net_device *ndev) priv->bd_l2sram_en = 0; } } +#endif if (!priv->bd_l2sram_en) vaddr = dma_alloc_coherent(dev, BD_RING_REG_SZ(priv), @@ -878,10 +882,12 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev) goto err_grp_init; } +#ifdef CONFIG_FSL_85XX_CACHE_SRAM if (gfar_l2sram_en) { /* try to alloc the BD rings to L2 SRAM */ priv->bd_l2sram_en = 1; } +#endif stash = of_get_property(np, "bd-stash", NULL); @@ -2145,9 +2151,11 @@ static void free_skb_resources(struct gfar_private *priv) free_skb_rx_queue(rx_queue); } +#ifdef CONFIG_FSL_85XX_CACHE_SRAM if (priv->bd_l2sram_en) mpc85xx_cache_sram_free(priv->tx_queue[0]->tx_bd_base); else +#endif dma_free_coherent(priv->dev, BD_RING_REG_SZ(priv), priv->tx_queue[0]->tx_bd_base, priv->tx_queue[0]->tx_bd_dma_base); |