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authorJesse Huang <jesse@icplus.com.tw>2006-10-20 21:42:13 (GMT)
committerJeff Garzik <jeff@garzik.org>2006-12-02 05:12:02 (GMT)
commitacd70c2bfddb52aee27a4864c160bea7f0d117e1 (patch)
tree79d5f236d6ed31bc719a6f4f3494c5632119ac51 /drivers/net/sundance.c
parent6b655529c3d817ed1b69cf2dd29e2c3ce5148a2b (diff)
downloadlinux-fsl-qoriq-acd70c2bfddb52aee27a4864c160bea7f0d117e1.tar.xz
[PATCH] sundance: correct initial and close hardware step.
Correct initial and close hardware step. In some embedded system down and up IP100A will cause DMA crash. We add some for safe down and up IP100A. Signed-off-by: Jesse Huang <jesse@icplus.com.tw> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/sundance.c')
-rw-r--r--drivers/net/sundance.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c
index 91cd2f5..fba64d3 100644
--- a/drivers/net/sundance.c
+++ b/drivers/net/sundance.c
@@ -788,6 +788,7 @@ static int netdev_open(struct net_device *dev)
{
struct netdev_private *np = netdev_priv(dev);
void __iomem *ioaddr = np->base;
+ unsigned long flags;
int i;
/* Do we need to reset the chip??? */
@@ -832,6 +833,10 @@ static int netdev_open(struct net_device *dev)
iowrite8(0x01, ioaddr + DebugCtrl1);
netif_start_queue(dev);
+ spin_lock_irqsave(&np->lock, flags);
+ reset_tx(dev);
+ spin_unlock_irqrestore(&np->lock, flags);
+
iowrite16 (StatsEnable | RxEnable | TxEnable, ioaddr + MACCtrl1);
if (netif_msg_ifup(np))
@@ -1651,6 +1656,9 @@ static int netdev_close(struct net_device *dev)
/* Disable interrupts by clearing the interrupt mask. */
iowrite16(0x0000, ioaddr + IntrEnable);
+ /* Disable Rx and Tx DMA for safely release resource */
+ iowrite32(0x500, ioaddr + DMACtrl);
+
/* Stop the chip's Tx and Rx processes. */
iowrite16(TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl1);