diff options
| author | Nick Kossifidis <mick@madwifi.org> | 2008-09-28 23:09:09 (GMT) |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2008-09-30 18:07:25 (GMT) |
| commit | 1bef016a5a2c52de45b332c8fa797958becde9bf (patch) | |
| tree | 2389e6e4bdf8151286d56511f7c2f39bb33077b9 /drivers/net/wireless/ath5k/qcu.c | |
| parent | 14be9947ef9843102b67d315c7483de112b5b2d7 (diff) | |
| download | linux-fsl-qoriq-1bef016a5a2c52de45b332c8fa797958becde9bf.tar.xz | |
ath5k: Update registers and SREV ids v2
* Update registers
* Update SREV values and add some PHY srevs
* Prepare ath5k.h for newer radios etc
Thanks to Atheros 's HAL source we now know for sure how many parts we have
and what their SREV values are. We also have some updates on registers. Prepare
ath5k for some major updates ;-)
My previous mail had 2 more patches following (git log misusage), sorry for double
posting ;-(
Changes-Licensed-under: ISC
Signed-Off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath5k/qcu.c')
| -rw-r--r-- | drivers/net/wireless/ath5k/qcu.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath5k/qcu.c b/drivers/net/wireless/ath5k/qcu.c index 2e20f781..01bf091 100644 --- a/drivers/net/wireless/ath5k/qcu.c +++ b/drivers/net/wireless/ath5k/qcu.c @@ -375,7 +375,7 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) case AR5K_TX_QUEUE_BEACON: AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), AR5K_QCU_MISC_FRSHED_DBA_GT | - AR5K_QCU_MISC_CBREXP_BCN | + AR5K_QCU_MISC_CBREXP_BCN_DIS | AR5K_QCU_MISC_BCN_ENABLE); AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue), @@ -395,8 +395,8 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) case AR5K_TX_QUEUE_CAB: AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), AR5K_QCU_MISC_FRSHED_DBA_GT | - AR5K_QCU_MISC_CBREXP | - AR5K_QCU_MISC_CBREXP_BCN); + AR5K_QCU_MISC_CBREXP_DIS | + AR5K_QCU_MISC_CBREXP_BCN_DIS); AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_DFS_MISC(queue), (AR5K_DCU_MISC_ARBLOCK_CTL_GLOBAL << @@ -405,7 +405,7 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue) case AR5K_TX_QUEUE_UAPSD: AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), - AR5K_QCU_MISC_CBREXP); + AR5K_QCU_MISC_CBREXP_DIS); break; case AR5K_TX_QUEUE_DATA: |