diff options
author | Yinghai Lu <yinghai@kernel.org> | 2013-07-22 21:37:17 (GMT) |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-07-25 18:35:03 (GMT) |
commit | 928bea964827d7824b548c1f8e06eccbbc4d0d7d (patch) | |
tree | 13110a5f05a65aa487cee8be5bd58017986f4929 /drivers/pci/setup-bus.c | |
parent | 55ed83a615730c2578da155bc99b68f4417ffe20 (diff) | |
download | linux-fsl-qoriq-928bea964827d7824b548c1f8e06eccbbc4d0d7d.tar.xz |
PCI: Delay enabling bridges until they're needed
We currently enable PCI bridges after scanning a bus and assigning
resources. This is often done in arch code.
This patch changes this so we don't enable a bridge until necessary, i.e.,
until we enable a PCI device behind the bridge. We do this in the generic
pci_enable_device() path, so this also removes the arch-specific code to
enable bridges.
[bhelgaas: changelog]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/setup-bus.c')
-rw-r--r-- | drivers/pci/setup-bus.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 4d9ebb4..8f86be1 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1440,7 +1440,7 @@ again: /* any device complain? */ if (list_empty(&fail_head)) - goto enable_and_dump; + goto dump; if (tried_times >= pci_try_num) { if (enable_local == undefined) @@ -1449,7 +1449,7 @@ again: dev_info(&bus->dev, "Automatically enabled pci realloc, if you have problem, try booting with pci=realloc=off\n"); free_list(&fail_head); - goto enable_and_dump; + goto dump; } dev_printk(KERN_DEBUG, &bus->dev, @@ -1482,10 +1482,7 @@ again: goto again; -enable_and_dump: - /* Depth last, update the hardware. */ - pci_enable_bridges(bus); - +dump: /* dump the resource on buses */ pci_bus_dump_resources(bus); } @@ -1556,7 +1553,6 @@ enable_all: if (retval) dev_err(&bridge->dev, "Error reenabling bridge (%d)\n", retval); pci_set_master(bridge); - pci_enable_bridges(parent); } EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources); |