diff options
| author | Harro Haan <hrhaan@gmail.com> | 2013-12-12 18:29:03 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:36:52 (GMT) |
| commit | 94658a9fd0af2d4cb42ba3e1e8fa72d7541176c3 (patch) | |
| tree | d8a0bf680ac239f60fdb603319acb63894759dd0 /drivers/pci | |
| parent | ce2f9cb83a82976f1bd9560daefdaf7fa7ac5ac2 (diff) | |
| download | linux-fsl-qoriq-94658a9fd0af2d4cb42ba3e1e8fa72d7541176c3.tar.xz | |
PCI: designware: Fix missing MSI IRQs
The interrupts were cleared after the IRQ handler was called. This means
that new interrupts that occur after the handler handled the previous IRQ
but before the interrupt is cleared will be missed.
Tested-by: Marek Vasut <marex@denx.de>
Tested-by: Matthias Mann <m.mann@arkona-technologies.de>
Signed-off-by: Harro Haan <hrhaan@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Mohit Kumar <mohit.kumar@st.com>
Cc: Richard Zhu <hong-xing.zhu@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Juergen Beisert <jbe@pengutronix.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
Cc: Sean Cross <xobs@kosagi.com>
The patch comes from:
https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?id=ca1658921b63e5771423603367c5bee528acc977
Change-Id: I9f23d8e1d96d1e580d3efa43b755d9a79103217c
Reviewed-on: http://git.am.freescale.net:8181/19686
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/host/pcie-designware.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c index 268e986..c954de6 100644 --- a/drivers/pci/host/pcie-designware.c +++ b/drivers/pci/host/pcie-designware.c @@ -167,11 +167,13 @@ void dw_handle_msi_irq(struct pcie_port *pp) while ((pos = find_next_bit(&val, 32, pos)) != 32) { irq = irq_find_mapping(pp->irq_domain, i * 32 + pos); + dw_pcie_wr_own_conf(pp, + PCIE_MSI_INTR0_STATUS + i * 12, + 4, 1 << pos); generic_handle_irq(irq); pos++; } } - dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_STATUS + i * 12, 4, val); } } |