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authorMinghuan Lian <Minghuan.Lian@freescale.com>2014-09-23 14:28:56 (GMT)
committerMatthew Weigel <Matthew.Weigel@freescale.com>2014-12-11 18:37:06 (GMT)
commitb1d0632015abedc155c4e91583ec465048f4dd98 (patch)
tree88fc3707259b9a9e3adde6441712f55a5d24d584 /drivers/pci
parentc6e5e81662b199625ab309b37f7cb062ca716c43 (diff)
downloadlinux-fsl-qoriq-b1d0632015abedc155c4e91583ec465048f4dd98.tar.xz
PCI: designware: Fix configuration base address when using 'reg'
The code has calculated cfg0_base and cfg1_base when parsing 'reg' or 'ranges' property of PCI DTS node, so remove duplicate calculation. When using 'reg', resource cfg is not used, so this code computed an incorrect configuration base. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Mohit KUMAR <mohit.kumar@st.com> The patch comes from: https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/commit/?h=next&id=ec98e9ab6f2475ff57c12d069e78b90548c0f60e Change-Id: Iac12f15871759879a572b77c0f1e44fd50e0bd4f Reviewed-on: http://git.am.freescale.net:8181/19707 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pcie-designware.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index 8a01ea9..4aa8146 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -509,7 +509,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
pp->mem_base = pp->mem.start;
if (!pp->va_cfg0_base) {
- pp->cfg0_base = pp->cfg.start;
pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base,
pp->cfg0_size);
if (!pp->va_cfg0_base) {
@@ -519,7 +518,6 @@ int __init dw_pcie_host_init(struct pcie_port *pp)
}
if (!pp->va_cfg1_base) {
- pp->cfg1_base = pp->cfg.start + pp->cfg0_size;
pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base,
pp->cfg1_size);
if (!pp->va_cfg1_base) {