diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 17:07:43 (GMT) |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 17:07:43 (GMT) |
| commit | d5381e42f64ca19f05c5799ffae5708acb6ed411 (patch) | |
| tree | 8b5e757a9847047102c475c6c583afc191d02e5b /drivers/staging/crystalhd/crystalhd_hw.c | |
| parent | f030d60b30855e18ac5bf080fa9e576147623d18 (diff) | |
| parent | b3c27b51db9112d03864fdef44fa611dd69c1425 (diff) | |
| download | linux-fsl-qoriq-d5381e42f64ca19f05c5799ffae5708acb6ed411.tar.xz | |
ASoC: Merge branch 'for-2.6.39' into for-2.6.40
Fix trivial conflict caused by silly spelling fix patch.
Conflicts:
sound/soc/codecs/wm8994.c
Diffstat (limited to 'drivers/staging/crystalhd/crystalhd_hw.c')
| -rw-r--r-- | drivers/staging/crystalhd/crystalhd_hw.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/staging/crystalhd/crystalhd_hw.c b/drivers/staging/crystalhd/crystalhd_hw.c index 13a514d..5acf39e 100644 --- a/drivers/staging/crystalhd/crystalhd_hw.c +++ b/drivers/staging/crystalhd/crystalhd_hw.c @@ -302,7 +302,7 @@ static bool crystalhd_start_device(struct crystalhd_adp *adp) crystalhd_enable_interrupts(adp); /* Enable the option for getting the total no. of DWORDS - * that have been transfered by the RXDMA engine + * that have been transferred by the RXDMA engine */ dbg_options = crystalhd_reg_rd(adp, MISC1_DMA_DEBUG_OPTIONS_REG); dbg_options |= 0x10; @@ -1776,7 +1776,7 @@ enum BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, return sts; } - /*Get the Responce Address*/ + /*Get the Response Address*/ cmd_res_addr = bc_dec_reg_rd(hw->adp, Cpu2HstMbx1); /*Read the Response*/ @@ -2367,7 +2367,7 @@ enum BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *hw) BCMLOG(BCMLOG_INFO, "clock is moving to %d with n %d with vco_mg %d\n", hw->core_clock_mhz, n, vco_mg); - /* Change the DRAM refresh rate to accomodate the new frequency */ + /* Change the DRAM refresh rate to accommodate the new frequency */ /* refresh reg = ((refresh_rate * clock_rate)/16) - 1; rounding up*/ refresh_reg = (7 * hw->core_clock_mhz / 16); bc_dec_reg_wr(hw->adp, SDRAM_REF_PARAM, ((1 << 12) | refresh_reg)); |