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| author | Paul Zimmerman <Paul.Zimmerman@synopsys.com> | 2013-07-16 19:22:12 (GMT) |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-07-23 21:56:19 (GMT) |
| commit | 4d3190e1f84f08692f4b87461108f72e9a0b452c (patch) | |
| tree | ce6aef1fd27250ba20c6987c2e30e68022719ea7 /drivers/staging/dwc2/hw.h | |
| parent | b39ed5c7b480f720d549987c9b3acd0833eafc8e (diff) | |
| download | linux-fsl-qoriq-4d3190e1f84f08692f4b87461108f72e9a0b452c.tar.xz | |
staging: dwc2: add driver parameter to set AHB config register value
The dwc2 driver sets the value of the DWC2 GAHBCFG register to 0x6,
which is GAHBCFG_HBSTLEN_INCR4. But different platforms may require
different values. In particular, the Broadcom 2835 SOC used in the
Raspberry Pi needs a value of 0x10, otherwise the DWC2 controller
stops working after a short period of heavy USB traffic.
So this patch adds another driver parameter named 'ahbcfg'. The
default value is 0x6. Any platform needing a different value should
add a DT attribute to set it.
This patch also removes the 'ahb_single' driver parameter, since
that bit can now be set using 'ahbcfg'.
This patch does not add DT support to platform.c, I will leave that
to whoever owns the first platform that needs a non-default value.
(Stephen?)
Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Matthijs Kooijman <matthijs@stdin.nl>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/dwc2/hw.h')
| -rw-r--r-- | drivers/staging/dwc2/hw.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/staging/dwc2/hw.h b/drivers/staging/dwc2/hw.h index 382a1d7..cf0dc97 100644 --- a/drivers/staging/dwc2/hw.h +++ b/drivers/staging/dwc2/hw.h @@ -78,6 +78,10 @@ #define GAHBCFG_HBSTLEN_INCR8 (5 << 1) #define GAHBCFG_HBSTLEN_INCR16 (7 << 1) #define GAHBCFG_GLBL_INTR_EN (1 << 0) +#define GAHBCFG_CTRL_MASK (GAHBCFG_P_TXF_EMP_LVL | \ + GAHBCFG_NP_TXF_EMP_LVL | \ + GAHBCFG_DMA_EN | \ + GAHBCFG_GLBL_INTR_EN) #define GUSBCFG HSOTG_REG(0x00C) #define GUSBCFG_FORCEDEVMODE (1 << 30) |