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author | Vijay Kumar <vijaykumar@bravegnu.org> | 2009-09-21 05:53:57 (GMT) |
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committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-12-11 20:23:09 (GMT) |
commit | dad1740133ffe49ae44044f97e4cbfcb42f037b1 (patch) | |
tree | 05c822c6e91afcced01c48f4cbaaba11b2f4ab1e /drivers/staging/poch | |
parent | 7e72a85e07cab448a5779cf1ee851b850930ec9f (diff) | |
download | linux-fsl-qoriq-dad1740133ffe49ae44044f97e4cbfcb42f037b1.tar.xz |
Staging: poch: Parameter to enable loopback
Enable setting of loopback through module parameter.
Signed-off-by: Vijay Kumar <vijaykumar@bravegnu.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/poch')
-rw-r--r-- | drivers/staging/poch/poch.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/staging/poch/poch.c b/drivers/staging/poch/poch.c index 1637c28..babd881 100644 --- a/drivers/staging/poch/poch.c +++ b/drivers/staging/poch/poch.c @@ -252,6 +252,11 @@ module_param(synth_rx, bool, 0600); MODULE_PARM_DESC(synth_rx, "Synthesize received values using a counter. Default: No"); +static int loopback; +module_param(loopback, bool, 0600); +MODULE_PARM_DESC(loopback, + "Enable hardware loopback of trasnmitted data. Default: No"); + static dev_t poch_first_dev; static struct class *poch_cls; static DEFINE_IDR(poch_ids); @@ -830,9 +835,14 @@ static int poch_open(struct inode *inode, struct file *filp) if (channel->dir == CHANNEL_DIR_TX) { /* Flush TX FIFO and output data from cardbus. */ - iowrite32(FPGA_TX_CTL_FIFO_FLUSH - | FPGA_TX_CTL_OUTPUT_CARDBUS, - fpga + FPGA_TX_CTL_REG); + u32 ctl_val = 0; + + ctl_val |= FPGA_TX_CTL_FIFO_FLUSH; + ctl_val |= FPGA_TX_CTL_OUTPUT_CARDBUS; + if (loopback) + ctl_val |= FPGA_TX_CTL_LOOPBACK; + + iowrite32(ctl_val, fpga + FPGA_TX_CTL_REG); } else { /* Flush RX FIFO and output data to cardbus. */ u32 ctl_val = FPGA_RX_CTL_CONT_CAP | FPGA_RX_CTL_FIFO_FLUSH; |