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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-22 19:54:53 (GMT) |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-22 20:01:40 (GMT) |
commit | ae19ffbadc1b2100285a5b5b3d0a4e0a11390904 (patch) | |
tree | 3c2086ab67398a019089a47ca3f362a4bc6db74f /drivers/staging/rtl8192su/r8192S_rtl6052.c | |
parent | 34e84f39a27d059a3e6ec6e8b94aafa702e6f220 (diff) | |
parent | 9173a8ef24a6b1b8031507b35b8ffe5f85a87692 (diff) | |
download | linux-fsl-qoriq-ae19ffbadc1b2100285a5b5b3d0a4e0a11390904.tar.xz |
Merge branch 'master' into for-linus
Diffstat (limited to 'drivers/staging/rtl8192su/r8192S_rtl6052.c')
-rw-r--r-- | drivers/staging/rtl8192su/r8192S_rtl6052.c | 104 |
1 files changed, 0 insertions, 104 deletions
diff --git a/drivers/staging/rtl8192su/r8192S_rtl6052.c b/drivers/staging/rtl8192su/r8192S_rtl6052.c index 71caf81..69ef6df 100644 --- a/drivers/staging/rtl8192su/r8192S_rtl6052.c +++ b/drivers/staging/rtl8192su/r8192S_rtl6052.c @@ -23,15 +23,9 @@ #include "r8192U.h" #include "r8192S_rtl6052.h" -#ifdef RTL8192SU #include "r8192S_hw.h" #include "r8192S_phyreg.h" #include "r8192S_phy.h" -#else -#include "r8192U_hw.h" -#include "r819xU_phyreg.h" -#include "r819xU_phy.h" -#endif /*---------------------------Define Local Constant---------------------------*/ @@ -93,51 +87,6 @@ static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];// = {{0}};//FIXLZ *---------------------------------------------------------------------------*/ extern void RF_ChangeTxPath(struct net_device* dev, u16 DataRate) { -// We do not support gain table change inACUT now !!!! Delete later !!! -#if 0//(RTL92SE_FPGA_VERIFY == 0) - static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T - static u4Byte tx_gain_tbl1[6] - = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; - static u4Byte tx_gain_tbl2[6] - = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; - u1Byte i; - - if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) - { - // Set TX SYNC power G2G3 loop filter - PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G2, bMask20Bits, 0x0f000); - PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G3, bMask20Bits, 0xeacf1); - - // Change TX AGC gain table - for (i = 0; i < 6; i++) - PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TX_AGC, bMask20Bits, tx_gain_tbl1[i]); - - // Set PA to high value - PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G2, bMask20Bits, 0x01e39); - } - else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) - { - // Set TX SYNC power G2G3 loop filter - PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G2, bMask20Bits, 0x04440); - PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G3, bMask20Bits, 0xea4f1); - - // Change TX AGC gain table - for (i = 0; i < 6; i++) - PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TX_AGC, bMask20Bits, tx_gain_tbl2[i]); - - // Set PA low gain - PHY_SetRFReg(dev, (RF90_RADIO_PATH_E)RF90_PATH_A, - RF_TXPA_G2, bMask20Bits, 0x01e19); - } -#endif - } /* RF_ChangeTxPath */ @@ -162,7 +111,6 @@ void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth) //if (priv->card_8192 == NIC_8192SE) -#ifdef RTL8192SU //YJ,test,090113 { switch(Bandwidth) { @@ -184,26 +132,6 @@ void PHY_RF6052SetBandwidth(struct net_device* dev, HT_CHANNEL_WIDTH Bandwidth) } } // else -#else - { - for(eRFPath = 0; eRFPath <priv->NumTotalRFPath; eRFPath++) - { - switch(Bandwidth) - { - case HT_CHANNEL_WIDTH_20: - //PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x01); - break; - case HT_CHANNEL_WIDTH_20_40: - //PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, RF_CHNLBW, (BIT10|BIT11), 0x00); - break; - default: - RT_TRACE(COMP_DBG, "PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth ); - break; - - } - } - } -#endif } @@ -306,15 +234,6 @@ extern void PHY_RF6052SetOFDMTxPower(struct net_device* dev, u8 powerlevel) { ofdm_bandedge_chnl_low = 1; ofdm_bandedge_chnl_high = 11; - #if 0//cosa, Todo: check ofdm 40MHz, when lower and duplicate, the bandedge chnl low=3, high=9 - if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20_40) - { // Is it the same with the document? - if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) - else if(pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER; - else - pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; - } - #endif BandEdge_Pwrdiff = 0; if (Channel <= ofdm_bandedge_chnl_low) BandEdge_Pwrdiff = priv->TxPwrbandEdgeLegacyOfdm[RF90_PATH_A][0]; @@ -412,18 +331,6 @@ extern void PHY_RF6052SetOFDMTxPower(struct net_device* dev, u8 powerlevel) // if (priv->rf_type == RF_2T2R) { - #if 0//cosa, we have only one AntennaTxPwDiff - // HT OFDM - if (index > 1) - { - rf_pwr_diff = pHalData->AntennaTxPwDiff[0]; - } - // Legacy OFDM - else - { - rf_pwr_diff = pHalData->AntTxPwDiffLegacy[0]; - } - #endif rf_pwr_diff = priv->AntennaTxPwDiff[0]; //RTPRINT(FPHY, PHY_TXPWR, ("2T2R RF-B to RF-A PWR DIFF=%d\n", rf_pwr_diff)); @@ -684,21 +591,10 @@ RT_STATUS phy_RF6052_Config_ParaFile(struct net_device* dev) switch(eRFPath) { case RF90_PATH_A: -#if RTL8190_Download_Firmware_From_Header rtStatus= rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath); -#else - rtStatus = PHY_ConfigRFWithParaFile(Adapter, (char* )&szRadioAFile, (RF90_RADIO_PATH_E)eRFPath); -#endif break; case RF90_PATH_B: -#if RTL8190_Download_Firmware_From_Header rtStatus= rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath); -#else - if(priv->rf_type == RF_2T2R_GREEN) - rtStatus = PHY_ConfigRFWithParaFile(Adapter, (ps1Byte)&szRadioBGMFile, (RF90_RADIO_PATH_E)eRFPath); - else - rtStatus = PHY_ConfigRFWithParaFile(Adapter, (char* )&szRadioBFile, (RF90_RADIO_PATH_E)eRFPath); -#endif break; case RF90_PATH_C: break; |