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author | Toshiaki Yamane <yamanetoshi@gmail.com> | 2012-09-07 04:31:04 (GMT) |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-09-10 22:36:05 (GMT) |
commit | 82ee0c898b358084248463355ad8f8cbadcf971d (patch) | |
tree | 90a809cfb4c77a1d217c05f670904a4f07faeb93 /drivers/staging/rts_pstor | |
parent | 5c39c0584a6dd5f4449869fed308ee4e91aec719 (diff) | |
download | linux-fsl-qoriq-82ee0c898b358084248463355ad8f8cbadcf971d.tar.xz |
staging/rts_pstor: remove braces {} in sd.c (sd_ddr_pre_tuning_tx)
fixed below checkpatch warnings.
-WARNING: braces {} are not necessary for single statement blocks
Signed-off-by: Toshiaki Yamane <yamanetoshi@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/rts_pstor')
-rw-r--r-- | drivers/staging/rts_pstor/sd.c | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/drivers/staging/rts_pstor/sd.c b/drivers/staging/rts_pstor/sd.c index cb6ba17..9812c00 100644 --- a/drivers/staging/rts_pstor/sd.c +++ b/drivers/staging/rts_pstor/sd.c @@ -1743,15 +1743,13 @@ static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip) } retval = sd_change_phase(chip, (u8)i, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) continue; - } retval = sd_send_cmd_get_rsp(chip, SEND_STATUS, sd_card->sd_addr, SD_RSP_TYPE_R1, NULL, 0); - if ((retval == STATUS_SUCCESS) || !sd_check_err_code(chip, SD_RSP_TIMEOUT)) { + if ((retval == STATUS_SUCCESS) || !sd_check_err_code(chip, SD_RSP_TIMEOUT)) phase_map |= 1 << i; - } } RTSX_WRITE_REG(chip, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0); @@ -1759,14 +1757,12 @@ static int sd_ddr_pre_tuning_tx(struct rtsx_chip *chip) RTSX_DEBUGP("DDR TX pre tune phase_map = 0x%08x\n", phase_map); final_phase = sd_search_final_phase(chip, phase_map, TUNE_TX); - if (final_phase == 0xFF) { + if (final_phase == 0xFF) TRACE_RET(chip, STATUS_FAIL); - } retval = sd_change_phase(chip, final_phase, TUNE_TX); - if (retval != STATUS_SUCCESS) { + if (retval != STATUS_SUCCESS) TRACE_RET(chip, STATUS_FAIL); - } RTSX_DEBUGP("DDR TX pre tune phase: %d\n", (int)final_phase); |