diff options
| author | Daniel Cotey <puff65537@bansheeslibrary.com> | 2012-09-15 13:03:43 (GMT) |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-09-17 12:37:55 (GMT) |
| commit | 22f3504684b3fc4e452db60f54419f109fdb4260 (patch) | |
| tree | 94c7b73b28a9a2612492ef9dce7d515b5732438a /drivers/staging/silicom/bp_mod.h | |
| parent | 0118f42af24864b9451e347bc17941fd4c21cd83 (diff) | |
| download | linux-fsl-qoriq-22f3504684b3fc4e452db60f54419f109fdb4260.tar.xz | |
Staging: silicom: bp_mod.h: checkpatch tab and space cleanup
seventh chunk of bp_mod.h's cleanup
Signed-off-by: Daniel Cotey <puff65537@bansheeslibrary.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/silicom/bp_mod.h')
| -rw-r--r-- | drivers/staging/silicom/bp_mod.h | 54 |
1 files changed, 27 insertions, 27 deletions
diff --git a/drivers/staging/silicom/bp_mod.h b/drivers/staging/silicom/bp_mod.h index bc5ef43..a11b809 100644 --- a/drivers/staging/silicom/bp_mod.h +++ b/drivers/staging/silicom/bp_mod.h @@ -373,33 +373,33 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j) #define PEGF5_IF_SERIES(pid) \ ((pid == SILICOM_PEG2BPFI5_SSID) || \ - (pid==SILICOM_PEG2BPFI5LX_SSID)|| \ - (pid==SILICOM_PEG4BPFI6_SSID)|| \ - (pid==SILICOM_PEG4BPFI6LX_SSID)|| \ - (pid==SILICOM_PEG4BPFI6ZX_SSID)|| \ - (pid==SILICOM_PEG2BPFI6_SSID)|| \ - (pid==SILICOM_PEG2BPFI6LX_SSID)|| \ - (pid==SILICOM_PEG2BPFI6ZX_SSID)|| \ - (pid==SILICOM_PEG2BPFI6FLXM_SSID)|| \ - (pid==SILICOM_PEG2DBFI6_SSID)|| \ - (pid==SILICOM_PEG2DBFI6LX_SSID)|| \ - (pid==SILICOM_PEG2DBFI6ZX_SSID)|| \ - (pid==SILICOM_PEG4BPI6FC_SSID)|| \ - (pid==SILICOM_PEG4BPFI6FCLX_SSID)|| \ - (pid==SILICOM_PEG4BPI6FC_SSID)|| \ - (pid==SILICOM_M1EG2BPFI6_SSID)|| \ - (pid==SILICOM_M1EG2BPFI6LX_SSID)|| \ - (pid==SILICOM_M1EG2BPFI6ZX_SSID)|| \ - (pid==SILICOM_M1EG4BPFI6_SSID)|| \ - (pid==SILICOM_M1EG4BPFI6LX_SSID)|| \ - (pid==SILICOM_M1EG4BPFI6ZX_SSID)|| \ - (pid==SILICOM_M2EG2BPFI6_SSID)|| \ - (pid==SILICOM_M2EG2BPFI6LX_SSID)|| \ - (pid==SILICOM_M2EG2BPFI6ZX_SSID)|| \ - (pid==SILICOM_M2EG4BPFI6_SSID)|| \ - (pid==SILICOM_M2EG4BPFI6LX_SSID)|| \ - (pid==SILICOM_M2EG4BPFI6ZX_SSID)|| \ - (pid==SILICOM_PEG4BPFI6FCZX_SSID)) + (pid == SILICOM_PEG2BPFI5LX_SSID) || \ + (pid == SILICOM_PEG4BPFI6_SSID) || \ + (pid == SILICOM_PEG4BPFI6LX_SSID) || \ + (pid == SILICOM_PEG4BPFI6ZX_SSID) || \ + (pid == SILICOM_PEG2BPFI6_SSID) || \ + (pid == SILICOM_PEG2BPFI6LX_SSID) || \ + (pid == SILICOM_PEG2BPFI6ZX_SSID) || \ + (pid == SILICOM_PEG2BPFI6FLXM_SSID) || \ + (pid == SILICOM_PEG2DBFI6_SSID) || \ + (pid == SILICOM_PEG2DBFI6LX_SSID) || \ + (pid == SILICOM_PEG2DBFI6ZX_SSID) || \ + (pid == SILICOM_PEG4BPI6FC_SSID) || \ + (pid == SILICOM_PEG4BPFI6FCLX_SSID) || \ + (pid == SILICOM_PEG4BPI6FC_SSID) || \ + (pid == SILICOM_M1EG2BPFI6_SSID) || \ + (pid == SILICOM_M1EG2BPFI6LX_SSID) || \ + (pid == SILICOM_M1EG2BPFI6ZX_SSID) || \ + (pid == SILICOM_M1EG4BPFI6_SSID) || \ + (pid == SILICOM_M1EG4BPFI6LX_SSID) || \ + (pid == SILICOM_M1EG4BPFI6ZX_SSID) || \ + (pid == SILICOM_M2EG2BPFI6_SSID) || \ + (pid == SILICOM_M2EG2BPFI6LX_SSID) || \ + (pid == SILICOM_M2EG2BPFI6ZX_SSID) || \ + (pid == SILICOM_M2EG4BPFI6_SSID) || \ + (pid == SILICOM_M2EG4BPFI6LX_SSID) || \ + (pid == SILICOM_M2EG4BPFI6ZX_SSID) || \ + (pid == SILICOM_PEG4BPFI6FCZX_SSID)) #define PEG5_IF_SERIES(pid) \ ((pid==SILICOM_PEG4BPI6_SSID)|| \ |