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authorThomas Abraham <thomas.abraham@linaro.org>2011-10-24 09:47:57 (GMT)
committerKukjin Kim <kgene.kim@samsung.com>2011-12-23 01:06:58 (GMT)
commitc3310fbbeb9db6967900ed22eb3d0bd0bb0e892c (patch)
tree0aaf7a11e30ab18ad39804f4fd8beac29d671d9b /drivers/tty/serial/s5pv210.c
parentafba7f91e64025748a2cfec181e5a910fd0dee0e (diff)
downloadlinux-fsl-qoriq-c3310fbbeb9db6967900ed22eb3d0bd0bb0e892c.tar.xz
serial: samsung: remove all uses of get_clksrc and set_clksrc
With clkdev based clock lookup support, the clock set and get operation using clock names communicated between the samsung uart driver and the SoC specific extension can be removed. In addition to that, for each platform specific extension, add the default clock selection, number of clock options for uart baud generator, clock selection bit mask and shift values which is required by the clkdev support in samsung uart driver. The default clock selection value 'def_clk_sel' specifies the default clock to be used as the source clock for baud rate generator in case the platform code does not specify the same. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/tty/serial/s5pv210.c')
-rw-r--r--drivers/tty/serial/s5pv210.c60
1 files changed, 4 insertions, 56 deletions
diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
index 03b249e..173df5a 100644
--- a/drivers/tty/serial/s5pv210.c
+++ b/drivers/tty/serial/s5pv210.c
@@ -25,60 +25,6 @@
#include <plat/regs-serial.h>
#include "samsung.h"
-static int s5pv210_serial_setsource(struct uart_port *port,
- struct s3c24xx_uart_clksrc *clk)
-{
- struct s3c24xx_uart_port *ourport;
- struct s3c2410_uartcfg *cfg;
- unsigned long ucon = rd_regl(port, S3C2410_UCON);
-
- ourport = container_of(port, struct s3c24xx_uart_port, port);
- cfg = ourport->cfg;
-
- if (cfg->flags & NO_NEED_CHECK_CLKSRC)
- return 0;
-
- if (strcmp(clk->name, "pclk") == 0)
- ucon &= ~S5PV210_UCON_CLKMASK;
- else if (strcmp(clk->name, "uclk1") == 0)
- ucon |= S5PV210_UCON_CLKMASK;
- else {
- printk(KERN_ERR "unknown clock source %s\n", clk->name);
- return -EINVAL;
- }
-
- wr_regl(port, S3C2410_UCON, ucon);
- return 0;
-}
-
-
-static int s5pv210_serial_getsource(struct uart_port *port,
- struct s3c24xx_uart_clksrc *clk)
-{
- struct s3c24xx_uart_port *ourport;
- struct s3c2410_uartcfg *cfg;
- u32 ucon = rd_regl(port, S3C2410_UCON);
-
- ourport = container_of(port, struct s3c24xx_uart_port, port);
- cfg = ourport->cfg;
-
- clk->divisor = 1;
-
- if (cfg->flags & NO_NEED_CHECK_CLKSRC)
- return 0;
-
- switch (ucon & S5PV210_UCON_CLKMASK) {
- case S5PV210_UCON_PCLK:
- clk->name = "pclk";
- break;
- case S5PV210_UCON_UCLK:
- clk->name = "uclk1";
- break;
- }
-
- return 0;
-}
-
static int s5pv210_serial_resetport(struct uart_port *port,
struct s3c2410_uartcfg *cfg)
{
@@ -109,8 +55,10 @@ static int s5pv210_serial_resetport(struct uart_port *port,
.tx_fifofull = S5PV210_UFSTAT_TXFULL, \
.tx_fifomask = S5PV210_UFSTAT_TXMASK, \
.tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \
- .get_clksrc = s5pv210_serial_getsource, \
- .set_clksrc = s5pv210_serial_setsource, \
+ .def_clk_sel = S3C2410_UCON_CLKSEL0, \
+ .num_clks = 2, \
+ .clksel_mask = S5PV210_UCON_CLKMASK, \
+ .clksel_shift = S5PV210_UCON_CLKSHIFT, \
.reset_port = s5pv210_serial_resetport
static struct s3c24xx_uart_info s5p_port_fifo256 = {