diff options
| author | Jingchang Lu <jingchang.lu@freescale.com> | 2014-10-14 02:28:44 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:38:58 (GMT) |
| commit | 5ccc4130fc9501cf73bd65a1386535b1e9f16d7c (patch) | |
| tree | 80632009a04743ddf4e5d181e8a28e249512e906 /drivers/tty | |
| parent | d22a0c88660f80207e1a96be3b278f1500b73bed (diff) | |
| download | linux-fsl-qoriq-5ccc4130fc9501cf73bd65a1386535b1e9f16d7c.tar.xz | |
serial: fsl-lpuart: add lpuart32 Power Management support
This adds 32-bit register lpuart32 power management support,
this also updates the 8-bit register lpuart resume function.
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
---
This patch has been sent upstream for review:
https://patchwork.kernel.org/patch/5145341/
Change-Id: I0ed49f80d48407394cb0788f422374236da171b1
Reviewed-on: http://git.am.freescale.net:8181/21931
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'drivers/tty')
| -rw-r--r-- | drivers/tty/serial/fsl_lpuart.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index 183883a..1c5d020 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -1458,6 +1458,20 @@ static int lpuart_suspend(struct device *dev) static int lpuart_resume(struct device *dev) { struct lpuart_port *sport = dev_get_drvdata(dev); + unsigned long temp; + + if (sport->lpuart32) { + lpuart32_setup_watermark(sport); + temp = lpuart32_read(sport->port.membase + UARTCTRL); + temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE | + UARTCTRL_TE | UARTCTRL_ILIE); + lpuart32_write(temp, sport->port.membase + UARTCTRL); + } else { + lpuart_setup_watermark(sport); + temp = readb(sport->port.membase + UARTCR2); + temp |= (UARTCR2_RIE | UARTCR2_TIE | UARTCR2_RE | UARTCR2_TE); + writeb(temp, sport->port.membase + UARTCR2); + } uart_resume_port(&lpuart_reg, &sport->port); |