diff options
author | Sarah Sharp <sarah.a.sharp@linux.intel.com> | 2009-04-30 02:04:32 (GMT) |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-06-16 04:44:50 (GMT) |
commit | 3841d56ebb9730c786a59bf3207529c35214df26 (patch) | |
tree | 6f9bd9e5eb0d291217240e1a38af0f1afadaa836 /drivers/usb/host/xhci-hcd.c | |
parent | 045f123d9c83b9a18c9d43a9afbf52bf0799640d (diff) | |
download | linux-fsl-qoriq-3841d56ebb9730c786a59bf3207529c35214df26.tar.xz |
USB: xhci: Fix register write order.
The 0.95 xHCI spec says that if the xHCI HW support 64-bit addressing, you
must write the whole 64-bit address as one atomic operation, or write the
low 32 bits, and then the high 32 bits. I had the register writes
swapped in some places.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/xhci-hcd.c')
-rw-r--r-- | drivers/usb/host/xhci-hcd.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/usb/host/xhci-hcd.c b/drivers/usb/host/xhci-hcd.c index 9ffa1fa..1318807 100644 --- a/drivers/usb/host/xhci-hcd.c +++ b/drivers/usb/host/xhci-hcd.c @@ -416,11 +416,11 @@ int xhci_run(struct usb_hcd *hcd) xhci_dbg(xhci, "Event ring:\n"); xhci_debug_ring(xhci, xhci->event_ring); xhci_dbg_ring_ptrs(xhci, xhci->event_ring); - temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[1]); - xhci_dbg(xhci, "ERST deq upper = 0x%x\n", temp); temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]); temp &= ERST_PTR_MASK; xhci_dbg(xhci, "ERST deq = 0x%x\n", temp); + temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[1]); + xhci_dbg(xhci, "ERST deq upper = 0x%x\n", temp); temp = xhci_readl(xhci, &xhci->op_regs->command); temp |= (CMD_RUN); |