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author | Sarah Sharp <sarah.a.sharp@linux.intel.com> | 2012-05-16 20:36:24 (GMT) |
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committer | Sarah Sharp <sarah.a.sharp@linux.intel.com> | 2012-05-18 22:42:04 (GMT) |
commit | e3567d2c15a7a8e2f992a5f7c7683453ca406d82 (patch) | |
tree | 2442117f7358e50f49cfecd030a6017d392f474c /drivers/usb/host/xhci.h | |
parent | 3b3db026414bba1c8f45c49d5eeaefd48d66e1ae (diff) | |
download | linux-fsl-qoriq-e3567d2c15a7a8e2f992a5f7c7683453ca406d82.tar.xz |
xhci: Add Intel U1/U2 timeout policy.
All Intel xHCI host controllers support USB 3.0 Link Power Management.
The Panther Point xHCI host controller needs the xHCI driver to
calculate the U1 and U2 timeout values, because it will blindly accept a
MEL that would cause scheduling issues.
The Lynx Point xHCI host controller will reject MEL values that are too
high, but internally it implements the same algorithm that is needed for
Panther Point xHCI.
Simplify the code paths by just having the xHCI driver calculate what
the U1/U2 timeouts should be. Comments on the policy are in the code.
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Diffstat (limited to 'drivers/usb/host/xhci.h')
-rw-r--r-- | drivers/usb/host/xhci.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index d55b367..de3d6e3 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1489,6 +1489,7 @@ struct xhci_hcd { #define XHCI_AMD_0x96_HOST (1 << 9) #define XHCI_TRUST_TX_LENGTH (1 << 10) #define XHCI_LPM_SUPPORT (1 << 11) +#define XHCI_INTEL_HOST (1 << 12) unsigned int num_active_eps; unsigned int limit_active_eps; /* There are two roothubs to keep track of bus suspend info for */ |