diff options
author | Tomoya <tomoya-linux@dsn.okisemi.com> | 2010-12-12 20:24:19 (GMT) |
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committer | David S. Miller <davem@davemloft.net> | 2010-12-13 20:24:24 (GMT) |
commit | 0e0805c4063d0611e282bb7fdebe2e223bfe7220 (patch) | |
tree | b317efdff5ff2c62a105dbefebfaea292f5ef981 /drivers | |
parent | 8714fcaca63203fe10331fe530ff48d3dd31de4e (diff) | |
download | linux-fsl-qoriq-0e0805c4063d0611e282bb7fdebe2e223bfe7220.tar.xz |
pch_can: Fix bit timing calculation issue
Modify like use calculated value directly passed by CAN core module.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/can/pch_can.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c index 3540978..5a6a0df 100644 --- a/drivers/net/can/pch_can.c +++ b/drivers/net/can/pch_can.c @@ -786,17 +786,15 @@ static int pch_set_bittiming(struct net_device *ndev) const struct can_bittiming *bt = &priv->can.bittiming; u32 canbit; u32 bepe; - u32 brp; /* Setting the CCE bit for accessing the Can Timing register. */ pch_can_bit_set(&priv->regs->cont, PCH_CTRL_CCE); - brp = (bt->tq) / (1000000000/PCH_CAN_CLK) - 1; - canbit = brp & PCH_MSK_BITT_BRP; + canbit = (bt->brp - 1) & PCH_MSK_BITT_BRP; canbit |= (bt->sjw - 1) << PCH_BIT_SJW_SHIFT; canbit |= (bt->phase_seg1 + bt->prop_seg - 1) << PCH_BIT_TSEG1_SHIFT; canbit |= (bt->phase_seg2 - 1) << PCH_BIT_TSEG2_SHIFT; - bepe = (brp & PCH_MSK_BRPE_BRPE) >> PCH_BIT_BRPE_BRPE_SHIFT; + bepe = ((bt->brp - 1) & PCH_MSK_BRPE_BRPE) >> PCH_BIT_BRPE_BRPE_SHIFT; iowrite32(canbit, &priv->regs->bitt); iowrite32(bepe, &priv->regs->brpe); pch_can_bit_clear(&priv->regs->cont, PCH_CTRL_CCE); |