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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2012-10-05 15:06:01 (GMT)
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-10-10 22:43:20 (GMT)
commit1ce4292073695fd0fec74d1169bc94dadc339731 (patch)
tree3ee08e85b2f9d2034989b0d7dc18f2c068c8236d /drivers
parent2886e93f5d28c559b3de9c4f75547af31e14504e (diff)
downloadlinux-fsl-qoriq-1ce4292073695fd0fec74d1169bc94dadc339731.tar.xz
drm/i915: pipe and planes should be disabled on haswell_crtc_mode_set
So WARN in case they're not. It also does not make any sense to wait_for_vblank at this point. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 709497d..705ed80 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5217,6 +5217,11 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
WARN(num_connectors != 1, "%d connectors attached to pipe %c\n",
num_connectors, pipe_name(pipe));
+ WARN_ON(I915_READ(PIPECONF(pipe)) &
+ (PIPECONF_ENABLE | I965_PIPECONF_ACTIVE));
+
+ WARN_ON(I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLE);
+
if (!intel_ddi_pll_mode_set(crtc, adjusted_mode->clock))
return -EINVAL;
@@ -5357,8 +5362,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
haswell_set_pipeconf(crtc, adjusted_mode, dither);
- intel_wait_for_vblank(dev, pipe);
-
/* Set up the display plane register */
I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE);
POSTING_READ(DSPCNTR(plane));