diff options
author | Magnus Damm <damm@opensource.se> | 2011-04-25 13:32:11 (GMT) |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-05-23 05:33:59 (GMT) |
commit | 3593f5fe40a13badf6921ccbc3378b02fbf6a532 (patch) | |
tree | f2d8710c0e6abfb0f633935003bd532757a27f66 /drivers | |
parent | 31705e21f9b5a0628c043f88ff4d20488b47b8ab (diff) | |
download | linux-fsl-qoriq-3593f5fe40a13badf6921ccbc3378b02fbf6a532.tar.xz |
clocksource: sh_cmt: __clocksource_updatefreq_hz() update
This patch updates the clocksource part of the CMT driver
to make use of the __clocksource_updatefreq_hz() function.
Without this patch the old code uses clocksource_register()
together with a hack that assumes a never changing clock rate
(see clk_enable(), clk_get_rate() and clk_disable()).
The patch uses clocksource_register_hz() with 1 Hz as initial
value, then lets the ->enable() callback update the value
with __clocksource_updatefreq_hz() once the struct clk has
been enabled and the frequency is stable.
Signed-off-by: Magnus Damm <damm@opensource.se>
Acked-by: John Stultz <johnstul@us.ibm.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/clocksource/sh_cmt.c | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index f975d24..dc7c033 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -416,11 +416,15 @@ static cycle_t sh_cmt_clocksource_read(struct clocksource *cs) static int sh_cmt_clocksource_enable(struct clocksource *cs) { + int ret; struct sh_cmt_priv *p = cs_to_sh_cmt(cs); p->total_cycles = 0; - return sh_cmt_start(p, FLAG_CLOCKSOURCE); + ret = sh_cmt_start(p, FLAG_CLOCKSOURCE); + if (!ret) + __clocksource_updatefreq_hz(cs, p->rate); + return ret; } static void sh_cmt_clocksource_disable(struct clocksource *cs) @@ -448,19 +452,10 @@ static int sh_cmt_register_clocksource(struct sh_cmt_priv *p, cs->mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8); cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; - /* clk_get_rate() needs an enabled clock */ - clk_enable(p->clk); - p->rate = clk_get_rate(p->clk) / ((p->width == 16) ? 512 : 8); - clk_disable(p->clk); - - /* TODO: calculate good shift from rate and counter bit width */ - cs->shift = 0; - cs->mult = clocksource_hz2mult(p->rate, cs->shift); - dev_info(&p->pdev->dev, "used as clock source\n"); - clocksource_register(cs); - + /* Register with dummy 1 Hz value, gets updated in ->enable() */ + clocksource_register_hz(cs, 1); return 0; } |