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authorViresh Kumar <viresh.kumar@st.com>2011-03-04 09:28:32 (GMT)
committerVinod Koul <vinod.koul@intel.com>2011-03-06 19:42:28 (GMT)
commit29782da5f0206335e2325508ba4fee0d624ddab6 (patch)
treee9398004d1647b7082b86dcc392999de69e8e16b /firmware/.gitignore
parent1c5b0538c719f52cface39f699fb5d39a50149d6 (diff)
downloadlinux-fsl-qoriq-29782da5f0206335e2325508ba4fee0d624ddab6.tar.xz
dmaengine/dw_dmac fix: use readl & writel instead of __raw_readl & __raw_writel
On ARMv7 cores, device memory mapped as Normal Non-cacheable, may not guarantee ordered access causing failures in device drivers that do not use the mandatory memory barriers. readl & writel versions contain necessary memory barriers for this. commit 79f64dbf68c8a9779a7e9a25e0a9f0217a25b57a: "ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLE" can be referred for more information on this. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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