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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2012-05-02 11:07:06 (GMT) |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-05-02 12:37:51 (GMT) |
| commit | 074b5e1a99fb5017122591d70098601e0484ca6a (patch) | |
| tree | ca63d7bf7f0700f4a2bffd9da2dbf73977cbcae8 /fs/fcntl.c | |
| parent | 69964ea4c7b68c9399f7977aa5b9aa6539a6a98a (diff) | |
| download | linux-fsl-qoriq-074b5e1a99fb5017122591d70098601e0484ca6a.tar.xz | |
drm/i915: Do not read non-existent DPLL registers on PCH hardware
We only execute intel_decrease_pllclock for pre-PCH hardware, typically
gen4 mobiles. However, in the variable declaration we did read from the
non-PCH DPLL register, quite naughty and detected by SandyBridge.
Reported-and-tested-by: Andrey Rahmatullin <wrar@wrar.name>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49025
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'fs/fcntl.c')
0 files changed, 0 insertions, 0 deletions