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authorLaxman Dewangan <ldewangan@nvidia.com>2013-02-12 15:17:59 (GMT)
committerStephen Warren <swarren@nvidia.com>2013-02-13 18:17:03 (GMT)
commit527fad1bc519df8eedd397482febb51526e5d987 (patch)
tree003feaff3289f9d27292d2332710e951f142ea25 /fs/freevxfs/vxfs_fshead.h
parent8364f5d96509e206f02a74bbdc2d4e3742cdefe4 (diff)
downloadlinux-fsl-qoriq-527fad1bc519df8eedd397482febb51526e5d987.tar.xz
clk: tegra: initialise parent of uart clocks
Initialise the parent of UARTs to PLLP and disabling clock by default. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'fs/freevxfs/vxfs_fshead.h')
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