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| author | Ingo Molnar <mingo@elte.hu> | 2008-10-12 10:39:30 (GMT) |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-10-12 10:39:50 (GMT) |
| commit | 4c7145a1ec1bb789d5f07e47510e8bda546a7c4a (patch) | |
| tree | e2767b77e5413473a3bba302237f4669a203f183 /include/asm-mips/mips-boards/simint.h | |
| parent | 74e91604b2452c15bbe72d77b37cf47ed0310d13 (diff) | |
| parent | fd048088306656824958e7783ffcee27e241b361 (diff) | |
| download | linux-fsl-qoriq-4c7145a1ec1bb789d5f07e47510e8bda546a7c4a.tar.xz | |
Merge branch 'linus' into x86/spinlocks
Done to prevent this failure of an Octopus merge:
Added arch/arm/include/asm/byteorder.h in both, but differently.
ERROR: Merge conflict in arch/arm/include/asm/byteorder.h
Auto-merging include/asm-x86/spinlock.h
ERROR: Merge conflict in include/asm-x86/spinlock.h
fatal: merge program failed
Diffstat (limited to 'include/asm-mips/mips-boards/simint.h')
| -rw-r--r-- | include/asm-mips/mips-boards/simint.h | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/include/asm-mips/mips-boards/simint.h b/include/asm-mips/mips-boards/simint.h deleted file mode 100644 index 8ef6db7..0000000 --- a/include/asm-mips/mips-boards/simint.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - */ -#ifndef _MIPS_SIMINT_H -#define _MIPS_SIMINT_H - -#include <irq.h> - -#define SIM_INT_BASE 0 -#define MIPSCPU_INT_MB0 2 -#define MIPS_CPU_TIMER_IRQ 7 - - -#define MSC01E_INT_BASE 64 - -#define MSC01E_INT_CPUCTR 11 - -#endif |