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author | Jeremy Fitzhardinge <jeremy@goop.org> | 2008-01-30 12:34:11 (GMT) |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 12:34:11 (GMT) |
commit | 6194ba6ff6ccf8d5c54c857600843c67aa82c407 (patch) | |
tree | 657dd9f452b252260fcf59959c0586920b8fe4c3 /include/asm-x86/pgalloc_32.h | |
parent | fd40d6e3188b12c59696d6cb4a6f26333814d66f (diff) | |
download | linux-fsl-qoriq-6194ba6ff6ccf8d5c54c857600843c67aa82c407.tar.xz |
x86: don't special-case pmd allocations as much
In x86 PAE mode, stop treating pmds as a special case. Previously
they were always allocated and freed with the pgd. The modifies the
code to be the same as 64-bit mode, where they are allocated on
demand.
This is a step on the way to unifying 32/64-bit pagetable allocation
as much as possible.
There is a complicating wart, however. When you install a new
reference to a pmd in the pgd, the processor isn't guaranteed to see
it unless you reload cr3. Since reloading cr3 also has the
side-effect of flushing the tlb, this is an expense that we want to
avoid whereever possible.
This patch simply avoids reloading cr3 unless the update is to the
current pagetable. Later patches will optimise this further.
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Cc: Andi Kleen <ak@suse.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: William Irwin <wli@holomorphy.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/pgalloc_32.h')
-rw-r--r-- | include/asm-x86/pgalloc_32.h | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/include/asm-x86/pgalloc_32.h b/include/asm-x86/pgalloc_32.h index 3482c34..0caa37a 100644 --- a/include/asm-x86/pgalloc_32.h +++ b/include/asm-x86/pgalloc_32.h @@ -63,21 +63,35 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte) */ static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) { - BUG(); - return (pmd_t *)2; + return (pmd_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT); } static inline void pmd_free(pmd_t *pmd) { + BUG_ON((unsigned long)pmd & (PAGE_SIZE-1)); + free_page((unsigned long)pmd); } static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) { + paravirt_release_pd(__pa(pmd) >> PAGE_SHIFT); + tlb_remove_page(tlb, virt_to_page(pmd)); } -static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) +static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd) { - BUG(); + paravirt_alloc_pd(mm, __pa(pmd) >> PAGE_SHIFT); + + /* Note: almost everything apart from _PAGE_PRESENT is + reserved at the pmd (PDPT) level. */ + set_pud(pudp, __pud(__pa(pmd) | _PAGE_PRESENT)); + + /* + * Pentium-II erratum A13: in PAE mode we explicitly have to flush + * the TLB via cr3 if the top-level pgd is changed... + */ + if (mm == current->active_mm) + write_cr3(read_cr3()); } #endif /* CONFIG_X86_PAE */ |