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author | Viresh Kumar <viresh.kumar@linaro.org> | 2012-11-12 17:26:03 (GMT) |
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committer | Viresh Kumar <viresh.kumar@linaro.org> | 2012-11-26 11:25:33 (GMT) |
commit | df1590d9ae5e37e07e7cf91107e4c2c946ce8bf4 (patch) | |
tree | 7e17333920f4ab9986f3f40e881b4bc890a91724 /include/linux/irqchip/spear-shirq.h | |
parent | e2eb69183ec4156eb814e67672e492bf902bbcd2 (diff) | |
download | linux-fsl-qoriq-df1590d9ae5e37e07e7cf91107e4c2c946ce8bf4.tar.xz |
ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
This patch moves shirq interrupt controllers driver and header file out of
plat-spear directory. It is moved to drivers/irqchip/ directory.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'include/linux/irqchip/spear-shirq.h')
-rw-r--r-- | include/linux/irqchip/spear-shirq.h | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/include/linux/irqchip/spear-shirq.h b/include/linux/irqchip/spear-shirq.h new file mode 100644 index 0000000..c8be16d --- /dev/null +++ b/include/linux/irqchip/spear-shirq.h @@ -0,0 +1,64 @@ +/* + * SPEAr platform shared irq layer header file + * + * Copyright (C) 2009-2012 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __SPEAR_SHIRQ_H +#define __SPEAR_SHIRQ_H + +#include <linux/irq.h> +#include <linux/types.h> + +/* + * struct shirq_regs: shared irq register configuration + * + * enb_reg: enable register offset + * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt + * status_reg: status register offset + * status_reg_mask: status register valid mask + * clear_reg: clear register offset + * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt + */ +struct shirq_regs { + u32 enb_reg; + u32 reset_to_enb; + u32 status_reg; + u32 clear_reg; + u32 reset_to_clear; +}; + +/* + * struct spear_shirq: shared irq structure + * + * irq: hardware irq number + * irq_base: base irq in linux domain + * irq_nr: no. of shared interrupts in a particular block + * irq_bit_off: starting bit offset in the status register + * invalid_irq: irq group is currently disabled + * base: base address of shared irq register + * regs: register configuration for shared irq block + */ +struct spear_shirq { + u32 irq; + u32 irq_base; + u32 irq_nr; + u32 irq_bit_off; + int invalid_irq; + void __iomem *base; + struct shirq_regs regs; +}; + +int __init spear300_shirq_of_init(struct device_node *np, + struct device_node *parent); +int __init spear310_shirq_of_init(struct device_node *np, + struct device_node *parent); +int __init spear320_shirq_of_init(struct device_node *np, + struct device_node *parent); + +#endif /* __SPEAR_SHIRQ_H */ |