diff options
author | Dan Williams <dan.j.williams@intel.com> | 2007-02-13 16:13:04 (GMT) |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-17 15:04:53 (GMT) |
commit | 4434c5c7fd61c6713de882a2272b66f32fe7cac3 (patch) | |
tree | f20c9c4eba18dd915f07185cee5ededf33e28c02 /include | |
parent | f80dff9da07d81da16e3b842118d47b9febf9c01 (diff) | |
download | linux-fsl-qoriq-4434c5c7fd61c6713de882a2272b66f32fe7cac3.tar.xz |
[ARM] 4186/1: iop: remove cp6_enable/disable routines
This functionality is replaced by cp6_trap
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-iop13xx/iop13xx.h | 26 | ||||
-rw-r--r-- | include/asm-arm/arch-iop13xx/irqs.h | 17 | ||||
-rw-r--r-- | include/asm-arm/arch-iop13xx/system.h | 2 | ||||
-rw-r--r-- | include/asm-arm/hardware/iop3xx.h | 27 |
4 files changed, 0 insertions, 72 deletions
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h index a88522a..e743059 100644 --- a/include/asm-arm/arch-iop13xx/iop13xx.h +++ b/include/asm-arm/arch-iop13xx/iop13xx.h @@ -12,32 +12,6 @@ void iop13xx_init_irq(void); void iop13xx_init_time(unsigned long tickrate); unsigned long iop13xx_gettimeoffset(void); -/* handle cp6 access - * to do: handle access in entry-armv5.S and unify with - * the iop3xx implementation - * note: use iop13xx_cp6_enable_irq_save and iop13xx_cp6_irq_restore (irq.h) - * when interrupts are enabled - */ -static inline unsigned long iop13xx_cp6_save(void) -{ - u32 temp, cp_flags; - - asm volatile ( - "mrc p15, 0, %1, c15, c1, 0\n\t" - "orr %0, %1, #(1 << 6)\n\t" - "mcr p15, 0, %0, c15, c1, 0\n\t" - : "=r" (temp), "=r"(cp_flags)); - - return cp_flags; -} - -static inline void iop13xx_cp6_restore(unsigned long cp_flags) -{ - asm volatile ( - "mcr p15, 0, %0, c15, c1, 0\n\t" - : : "r" (cp_flags) ); -} - /* CPUID CP6 R0 Page 0 */ static inline int iop13xx_cpu_id(void) { diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h index 442e35a..5c6fac2 100644 --- a/include/asm-arm/arch-iop13xx/irqs.h +++ b/include/asm-arm/arch-iop13xx/irqs.h @@ -3,8 +3,6 @@ #ifndef __ASSEMBLER__ #include <linux/types.h> -#include <asm/system.h> /* local_irq_save */ -#include <asm/arch/iop13xx.h> /* iop13xx_cp6_* */ /* INTPND0 CP6 R0 Page 3 */ @@ -41,21 +39,6 @@ static inline u32 read_intpnd_3(void) asm volatile("mrc p6, 0, %0, c3, c3, 0":"=r" (val)); return val; } - -static inline void -iop13xx_cp6_enable_irq_save(unsigned long *cp_flags, unsigned long *irq_flags) -{ - local_irq_save(*irq_flags); - *cp_flags = iop13xx_cp6_save(); -} - -static inline void -iop13xx_cp6_irq_restore(unsigned long *cp_flags, - unsigned long *irq_flags) -{ - iop13xx_cp6_restore(*cp_flags); - local_irq_restore(*irq_flags); -} #endif #define INTBASE 0 diff --git a/include/asm-arm/arch-iop13xx/system.h b/include/asm-arm/arch-iop13xx/system.h index ee3a625..1278270 100644 --- a/include/asm-arm/arch-iop13xx/system.h +++ b/include/asm-arm/arch-iop13xx/system.h @@ -48,12 +48,10 @@ static inline void arch_reset(char mode) /* * Reset the internal bus (warning both cores are reset) */ - u32 cp_flags = iop13xx_cp6_save(); write_wdtcr(IOP13XX_WDTCR_EN_ARM); write_wdtcr(IOP13XX_WDTCR_EN); write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); write_wdtcr(0x1000); - iop13xx_cp6_restore(cp_flags); for(;;); } diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index c91b546..47fcbf6 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h @@ -283,33 +283,6 @@ void iop_init_cp6_handler(void); extern struct platform_device iop3xx_i2c0_device; extern struct platform_device iop3xx_i2c1_device; -extern inline void iop3xx_cp6_enable(void) -{ - u32 temp; - - asm volatile ( - "mrc p15, 0, %0, c15, c1, 0\n\t" - "orr %0, %0, #(1 << 6)\n\t" - "mcr p15, 0, %0, c15, c1, 0\n\t" - "mrc p15, 0, %0, c15, c1, 0\n\t" - "mov %0, %0\n\t" - "sub pc, pc, #4\n\t" - : "=r" (temp) ); -} - -extern inline void iop3xx_cp6_disable(void) -{ - u32 temp; - - asm volatile ( - "mrc p15, 0, %0, c15, c1, 0\n\t" - "bic %0, %0, #(1 << 6)\n\t" - "mcr p15, 0, %0, c15, c1, 0\n\t" - "mrc p15, 0, %0, c15, c1, 0\n\t" - "mov %0, %0\n\t" - "sub pc, pc, #4\n\t" - : "=r" (temp) ); -} #endif |