diff options
| author | Yangbo Lu <yangbo.lu@freescale.com> | 2015-06-11 10:16:36 (GMT) |
|---|---|---|
| committer | Zhengxiong Jin <Jason.Jin@freescale.com> | 2015-06-16 03:00:33 (GMT) |
| commit | 8d0408666626bd157649dbba34ac1e44b4d55caf (patch) | |
| tree | d5dc08e0366f4548673823b82581c3fc88548369 /include | |
| parent | e08d8bf61be6163f3bb4840042d8463c8c5b70a9 (diff) | |
| download | linux-fsl-qoriq-8d0408666626bd157649dbba34ac1e44b4d55caf.tar.xz | |
mmc: sdhci: more efficient interrupt enable register handling
Rather than wasting cycles read-modify-writing the interrupt enable
registers, cache the value locally instead.
This patch is from upstreaming linux, commit id
b537f94ce19583de1882f539a5cc49aa99260aca
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Change-Id: I3c1bb4d4b3f7d7dccbaa4748816bfe381edc484c
Reviewed-on: http://git.am.freescale.net:8181/37869
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mmc/sdhci.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h index 91bb4c9..1539790 100644 --- a/include/linux/mmc/sdhci.h +++ b/include/linux/mmc/sdhci.h @@ -185,6 +185,9 @@ struct sdhci_host { unsigned int ocr_avail_mmc; u32 ocr_mask; /* available voltages */ + /* cached registers */ + u32 ier; + wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read Ready interrupt */ unsigned int tuning_done; /* Condition flag set when CMD19 succeeds */ |