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| author | Kumar Gala <galak@kernel.crashing.org> | 2007-06-25 20:19:48 (GMT) |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2007-06-29 06:58:20 (GMT) |
| commit | ab0f9ad34d1eb31bb13cc4218d7717f8a85b12ed (patch) | |
| tree | aa4110045c5089ca0d498bdb32af29f3dfdf1d1a /include | |
| parent | dfac6faf8f42d5a9dd6919d7a2a41ef91eb77b4f (diff) | |
| download | linux-fsl-qoriq-ab0f9ad34d1eb31bb13cc4218d7717f8a85b12ed.tar.xz | |
[POWERPC] Added indirect_type to handle variants of PCI ops
The generic PCI config ops indirect support for ppc32 covers only two
cases (implicit vs explicit) type 0/1 config cycles via set_cfg_type.
Added a indirect_type bit mask to handle other variants.
Added support for PCI-e extended registers and moved the cfg_type
handling into the bit mask for ARCH=powerpc. We can also use this to
handle indirect quirks.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-ppc/pci-bridge.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 70aab66..0dee56b 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -65,9 +65,19 @@ struct pci_controller { /* * If set, indirect method will set the cfg_type bit as * needed to generate type 1 configuration transactions. + * use only on ARCH=ppc */ int set_cfg_type; + /* + * Used for variants of PCI indirect handling and possible quirks: + * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 + * EXT_REG - provides access to PCI-e extended registers + */ +#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) +#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) + u32 indirect_type; + /* Currently, we limit ourselves to 1 IO range and 3 mem * ranges since the common pci_bus structure can't handle more */ |