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authorKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>2007-12-20 10:45:09 (GMT)
committerGreg Kroah-Hartman <gregkh@suse.de>2008-02-01 23:04:28 (GMT)
commitf1050a35cd99d6cfded7ce1273757dca84e92f9b (patch)
treecff53ccb259acaae0fe25f3caf396cc5df6426a7 /kernel/utsname.c
parent8bb7c7af1ff2a9e9e0936dbdd15901c80329c7af (diff)
downloadlinux-fsl-qoriq-f1050a35cd99d6cfded7ce1273757dca84e92f9b.tar.xz
pciehp: workaround against Bad DLLP during power off
Set Bad DLLP Mask bit in Correctable Error Mask Register during turning power off the slot. This is the workaround against Bad DLLP error that sometimes happen during turning power off on the slot which conforms to PCI Express 1.0a spec. The cause of this error seems that PCI Express 1.0a spec doesn't have the following consideration that was added to PCI Express 1.1 spec. "If the port is associated with a hot-pluggable slot (Hot-Plug Capable bit in the Slot Capabilities register set to 1b), and Power Controller Control bit in Slot Control register is 1b(Off), then any transition to DL Inactive must not be considered an error." Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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