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authorJack Morgenstein <jackm@dev.mellanox.co.il>2008-01-28 08:40:59 (GMT)
committerRoland Dreier <rolandd@cisco.com>2008-02-08 21:30:02 (GMT)
commitea54b10c7773007e173da31fe7adcc049da33331 (patch)
treeb13b77fb3807071a5b93ece7b564f6748d962bbc /lib/ts_fsm.c
parentb57aacfa7a95328f469d0360e49289b023c47e9e (diff)
downloadlinux-fsl-qoriq-ea54b10c7773007e173da31fe7adcc049da33331.tar.xz
IB/mlx4: Use multiple WQ blocks to post smaller send WQEs
ConnectX HCA supports shrinking WQEs, so that a single work request can be made of multiple units of wqe_shift. This way, WRs can differ in size, and do not have to be a power of 2 in size, saving memory and speeding up send WR posting. Unfortunately, if we do this then the wqe_index field in CQEs can't be used to look up the WR ID anymore, so our implementation does this only if selective signaling is off. Further, on 32-bit platforms, we can't use vmap() to make the QP buffer virtually contigious. Thus we have to use constant-sized WRs to make sure a WR is always fully within a single page-sized chunk. Finally, we use WRs with the NOP opcode to avoid wrapping around the queue buffer in the middle of posting a WR, and we set the NoErrorCompletion bit to avoid getting completions with error for NOP WRs. However, NEC is only supported starting with firmware 2.2.232, so we use constant-sized WRs for older firmware. And, since MLX QPs only support SEND, we use constant-sized WRs in this case. When stamping during NOP posting, do stamping following setting of the NOP WQE valid bit. Signed-off-by: Michael S. Tsirkin <mst@dev.mellanox.co.il> Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'lib/ts_fsm.c')
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