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authorHiep Cao Minh <cm-hiep@jinso.co.jp>2013-10-10 08:14:03 (GMT)
committerMark Brown <broonie@linaro.org>2013-10-10 10:23:25 (GMT)
commitcb52c673f8adc4a1cba7b645ff5375b57dae21fa (patch)
treec9de9abf82503ac4d3bc0b1024728bccac844c38 /net/ipv4/igmp.c
parent5ce0ba88650f2606244a761d92e2b725f4ab3583 (diff)
downloadlinux-fsl-qoriq-cb52c673f8adc4a1cba7b645ff5375b57dae21fa.tar.xz
spi/rspi: Fix 8bit data access, clear buffer
The R8A7790 has QSPI module which added into RSPI together. The transmit or receive data should be read from or written to with the longword-, word-, or byte-access width. Modify word- access to byte-access. In 16-bit data register, QSPI send or receive datas access from high 8-bit while RSPI send or receive datas access from low 8-bit on single mode. Modify to reset transmit-receive buffer data and reading dummy after data are transmited. RSPI has a TXMD bit on control register(SPCR) to set transmit-only mode when transmit data or Full-duplex synchronous mode when receive data. In QSPI the TXMD bit is not supported, so after transmit data, dummy should be read and before transmit or receive data the bufer register should be reset. This driver is the implementation of send and receive pio only, DMA is not supported at this time. Without this patch, it will occur error when transmit and receive Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'net/ipv4/igmp.c')
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