diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-08-04 22:39:55 (GMT) |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-08-04 22:39:55 (GMT) |
commit | 6ce90c430baef6e411dcf32e872913888bb3ef54 (patch) | |
tree | 01cadeaf2b0fd013fc278cc92a2969d9592ee583 /sound/pci/hda/hda_intel.c | |
parent | 9f3eea6a2fbf5a07625713dc35e5f8fb91adb12f (diff) | |
parent | 4b35d2ca2307d40ccb6b3b6f9cc25ac9178b2a6c (diff) | |
download | linux-fsl-qoriq-6ce90c430baef6e411dcf32e872913888bb3ef54.tar.xz |
Merge branch 'fix/hda' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
* 'fix/hda' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6:
ALSA: hda - Read buffer overflow
ALSA: hda: Correct EAPD for Dell Inspiron 1525
ALSA: hda: warn on spurious response
ALSA: hda: remember last command for each codec
ALSA: hda: read CORBWP inside reg_lock
ALSA: hda: take reg_lock in azx_init_cmd_io/azx_free_cmd_io
ALSA: hda: take cmd_mutex in probe_codec()
ALSA: hda: track CIRB/CORB command/response states for each codec
ALSA: hda - Fix quirk for Toshiba Satellite A135-S4527
Diffstat (limited to 'sound/pci/hda/hda_intel.c')
-rw-r--r-- | sound/pci/hda/hda_intel.c | 103 |
1 files changed, 74 insertions, 29 deletions
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 77c1b84..175f07a 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -253,7 +253,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; /* STATESTS int mask: S3,SD2,SD1,SD0 */ #define AZX_MAX_CODECS 4 -#define STATESTS_INT_MASK 0x0f +#define STATESTS_INT_MASK ((1 << AZX_MAX_CODECS) - 1) /* SD_CTL bits */ #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ @@ -361,8 +361,8 @@ struct azx_rb { dma_addr_t addr; /* physical address of CORB/RIRB buffer */ /* for RIRB */ unsigned short rp, wp; /* read/write pointers */ - int cmds; /* number of pending requests */ - u32 res; /* last read value */ + int cmds[AZX_MAX_CODECS]; /* number of pending requests */ + u32 res[AZX_MAX_CODECS]; /* last read value */ }; struct azx { @@ -418,7 +418,7 @@ struct azx { unsigned int probing :1; /* codec probing phase */ /* for debugging */ - unsigned int last_cmd; /* last issued command (to sync) */ + unsigned int last_cmd[AZX_MAX_CODECS]; /* for pending irqs */ struct work_struct irq_pending_work; @@ -513,6 +513,7 @@ static int azx_alloc_cmd_io(struct azx *chip) static void azx_init_cmd_io(struct azx *chip) { + spin_lock_irq(&chip->reg_lock); /* CORB set up */ chip->corb.addr = chip->rb.addr; chip->corb.buf = (u32 *)chip->rb.area; @@ -531,7 +532,8 @@ static void azx_init_cmd_io(struct azx *chip) /* RIRB set up */ chip->rirb.addr = chip->rb.addr + 2048; chip->rirb.buf = (u32 *)(chip->rb.area + 2048); - chip->rirb.wp = chip->rirb.rp = chip->rirb.cmds = 0; + chip->rirb.wp = chip->rirb.rp = 0; + memset(chip->rirb.cmds, 0, sizeof(chip->rirb.cmds)); azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr)); @@ -543,30 +545,60 @@ static void azx_init_cmd_io(struct azx *chip) azx_writew(chip, RINTCNT, 1); /* enable rirb dma and response irq */ azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN); + spin_unlock_irq(&chip->reg_lock); } static void azx_free_cmd_io(struct azx *chip) { + spin_lock_irq(&chip->reg_lock); /* disable ringbuffer DMAs */ azx_writeb(chip, RIRBCTL, 0); azx_writeb(chip, CORBCTL, 0); + spin_unlock_irq(&chip->reg_lock); +} + +static unsigned int azx_command_addr(u32 cmd) +{ + unsigned int addr = cmd >> 28; + + if (addr >= AZX_MAX_CODECS) { + snd_BUG(); + addr = 0; + } + + return addr; +} + +static unsigned int azx_response_addr(u32 res) +{ + unsigned int addr = res & 0xf; + + if (addr >= AZX_MAX_CODECS) { + snd_BUG(); + addr = 0; + } + + return addr; } /* send a command */ static int azx_corb_send_cmd(struct hda_bus *bus, u32 val) { struct azx *chip = bus->private_data; + unsigned int addr = azx_command_addr(val); unsigned int wp; + spin_lock_irq(&chip->reg_lock); + /* add command to corb */ wp = azx_readb(chip, CORBWP); wp++; wp %= ICH6_MAX_CORB_ENTRIES; - spin_lock_irq(&chip->reg_lock); - chip->rirb.cmds++; + chip->rirb.cmds[addr]++; chip->corb.buf[wp] = cpu_to_le32(val); azx_writel(chip, CORBWP, wp); + spin_unlock_irq(&chip->reg_lock); return 0; @@ -578,13 +610,14 @@ static int azx_corb_send_cmd(struct hda_bus *bus, u32 val) static void azx_update_rirb(struct azx *chip) { unsigned int rp, wp; + unsigned int addr; u32 res, res_ex; wp = azx_readb(chip, RIRBWP); if (wp == chip->rirb.wp) return; chip->rirb.wp = wp; - + while (chip->rirb.rp != wp) { chip->rirb.rp++; chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES; @@ -592,18 +625,24 @@ static void azx_update_rirb(struct azx *chip) rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); res = le32_to_cpu(chip->rirb.buf[rp]); + addr = azx_response_addr(res_ex); if (res_ex & ICH6_RIRB_EX_UNSOL_EV) snd_hda_queue_unsol_event(chip->bus, res, res_ex); - else if (chip->rirb.cmds) { - chip->rirb.res = res; + else if (chip->rirb.cmds[addr]) { + chip->rirb.res[addr] = res; smp_wmb(); - chip->rirb.cmds--; - } + chip->rirb.cmds[addr]--; + } else + snd_printk(KERN_ERR SFX "spurious response %#x:%#x, " + "last cmd=%#08x\n", + res, res_ex, + chip->last_cmd[addr]); } } /* receive a response */ -static unsigned int azx_rirb_get_response(struct hda_bus *bus) +static unsigned int azx_rirb_get_response(struct hda_bus *bus, + unsigned int addr) { struct azx *chip = bus->private_data; unsigned long timeout; @@ -616,10 +655,10 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) azx_update_rirb(chip); spin_unlock_irq(&chip->reg_lock); } - if (!chip->rirb.cmds) { + if (!chip->rirb.cmds[addr]) { smp_rmb(); bus->rirb_error = 0; - return chip->rirb.res; /* the last value */ + return chip->rirb.res[addr]; /* the last value */ } if (time_after(jiffies, timeout)) break; @@ -633,7 +672,8 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) if (chip->msi) { snd_printk(KERN_WARNING SFX "No response from codec, " - "disabling MSI: last cmd=0x%08x\n", chip->last_cmd); + "disabling MSI: last cmd=0x%08x\n", + chip->last_cmd[addr]); free_irq(chip->irq, chip); chip->irq = -1; pci_disable_msi(chip->pci); @@ -648,7 +688,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) if (!chip->polling_mode) { snd_printk(KERN_WARNING SFX "azx_get_response timeout, " "switching to polling mode: last cmd=0x%08x\n", - chip->last_cmd); + chip->last_cmd[addr]); chip->polling_mode = 1; goto again; } @@ -672,7 +712,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) snd_printk(KERN_ERR "hda_intel: azx_get_response timeout, " "switching to single_cmd mode: last cmd=0x%08x\n", - chip->last_cmd); + chip->last_cmd[addr]); chip->single_cmd = 1; bus->response_reset = 0; /* re-initialize CORB/RIRB */ @@ -692,7 +732,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus) */ /* receive a response */ -static int azx_single_wait_for_response(struct azx *chip) +static int azx_single_wait_for_response(struct azx *chip, unsigned int addr) { int timeout = 50; @@ -700,7 +740,7 @@ static int azx_single_wait_for_response(struct azx *chip) /* check IRV busy bit */ if (azx_readw(chip, IRS) & ICH6_IRS_VALID) { /* reuse rirb.res as the response return value */ - chip->rirb.res = azx_readl(chip, IR); + chip->rirb.res[addr] = azx_readl(chip, IR); return 0; } udelay(1); @@ -708,7 +748,7 @@ static int azx_single_wait_for_response(struct azx *chip) if (printk_ratelimit()) snd_printd(SFX "get_response timeout: IRS=0x%x\n", azx_readw(chip, IRS)); - chip->rirb.res = -1; + chip->rirb.res[addr] = -1; return -EIO; } @@ -716,6 +756,7 @@ static int azx_single_wait_for_response(struct azx *chip) static int azx_single_send_cmd(struct hda_bus *bus, u32 val) { struct azx *chip = bus->private_data; + unsigned int addr = azx_command_addr(val); int timeout = 50; bus->rirb_error = 0; @@ -728,7 +769,7 @@ static int azx_single_send_cmd(struct hda_bus *bus, u32 val) azx_writel(chip, IC, val); azx_writew(chip, IRS, azx_readw(chip, IRS) | ICH6_IRS_BUSY); - return azx_single_wait_for_response(chip); + return azx_single_wait_for_response(chip, addr); } udelay(1); } @@ -739,10 +780,11 @@ static int azx_single_send_cmd(struct hda_bus *bus, u32 val) } /* receive a response */ -static unsigned int azx_single_get_response(struct hda_bus *bus) +static unsigned int azx_single_get_response(struct hda_bus *bus, + unsigned int addr) { struct azx *chip = bus->private_data; - return chip->rirb.res; + return chip->rirb.res[addr]; } /* @@ -757,7 +799,7 @@ static int azx_send_cmd(struct hda_bus *bus, unsigned int val) { struct azx *chip = bus->private_data; - chip->last_cmd = val; + chip->last_cmd[azx_command_addr(val)] = val; if (chip->single_cmd) return azx_single_send_cmd(bus, val); else @@ -765,13 +807,14 @@ static int azx_send_cmd(struct hda_bus *bus, unsigned int val) } /* get a response */ -static unsigned int azx_get_response(struct hda_bus *bus) +static unsigned int azx_get_response(struct hda_bus *bus, + unsigned int addr) { struct azx *chip = bus->private_data; if (chip->single_cmd) - return azx_single_get_response(bus); + return azx_single_get_response(bus, addr); else - return azx_rirb_get_response(bus); + return azx_rirb_get_response(bus, addr); } #ifdef CONFIG_SND_HDA_POWER_SAVE @@ -1243,10 +1286,12 @@ static int probe_codec(struct azx *chip, int addr) (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID; unsigned int res; + mutex_lock(&chip->bus->cmd_mutex); chip->probing = 1; azx_send_cmd(chip->bus, cmd); - res = azx_get_response(chip->bus); + res = azx_get_response(chip->bus, addr); chip->probing = 0; + mutex_unlock(&chip->bus->cmd_mutex); if (res == -1) return -EIO; snd_printdd(SFX "codec #%d probed OK\n", addr); |