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| author | Chao Fu <B44548@freescale.com> | 2014-02-12 07:29:05 (GMT) |
|---|---|---|
| committer | Matthew Weigel <Matthew.Weigel@freescale.com> | 2014-12-11 18:37:38 (GMT) |
| commit | e251d7f80c22d192cc706b3800e0836705ea8007 (patch) | |
| tree | ac0c038f293e9c8d6a142aa32712d059d3294c36 /sound | |
| parent | cabbcd518fd26e3ad3f94f6a9464cfaae4789253 (diff) | |
| download | linux-fsl-qoriq-e251d7f80c22d192cc706b3800e0836705ea8007.tar.xz | |
spi/fsl-dspi: Convert to use regmap and add big-endian support
Freescale DSPI module will have two endianess in different platform,
but ARM is little endian. So when DSPI in big endian, core in little endian,
readl and writel can not adjust R/W register in this condition.
This patch will remove general readl/writel, and import regmap mechanism.
Data endian will be transfered in regmap APIs.
Documents: dspi add bool "big-endian" in dts node if DSPI module
work in big endian.
Signed-off-by: Chao Fu <b44548@freescale.com>
Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit 1acbdeb92c87fc18eade0815dedc257fe45b88b7)
Change-Id: I60e630bb18a2101af3154633bbe5824a52ac45f2
Reviewed-on: http://git.am.freescale.net:8181/20086
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Tested-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Diffstat (limited to 'sound')
0 files changed, 0 insertions, 0 deletions