diff options
| -rw-r--r-- | arch/sh/Kconfig | 2 | ||||
| -rw-r--r-- | arch/sh/cchips/hd6446x/hd64461.c | 21 |
2 files changed, 20 insertions, 3 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 0f023bb..9e565d9 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -731,7 +731,7 @@ config GUSA_RB config SPARSE_IRQ def_bool y depends on SUPERH32 && !SH_DREAMCAST && !SH_HIGHLANDER && \ - !SH_RTS7751R2D && !HD64461 + !SH_RTS7751R2D help This enables support for sparse irqs. This is useful in general as most CPUs have a fairly sparse array of IRQ vectors, which diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c index cbfedfb..b447091 100644 --- a/arch/sh/cchips/hd6446x/hd64461.c +++ b/arch/sh/cchips/hd6446x/hd64461.c @@ -73,7 +73,7 @@ static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc) int __init setup_hd64461(void) { - int i; + int i, nid = cpu_to_node(boot_cpu_data); if (!MACH_HD64461) return 0; @@ -90,9 +90,26 @@ int __init setup_hd64461(void) __raw_writew(0xffff, HD64461_NIMR); /* IRQ 80 -> 95 belongs to HD64461 */ - for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) + for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) { + unsigned int irq; + + irq = create_irq_nr(i, nid); + if (unlikely(irq == 0)) { + pr_err("%s: failed hooking irq %d for HD64461\n", + __func__, i); + return -EBUSY; + } + + if (unlikely(irq != i)) { + pr_err("%s: got irq %d but wanted %d, bailing.\n", + __func__, irq, i); + destroy_irq(irq); + return -EINVAL; + } + set_irq_chip_and_handler(i, &hd64461_irq_chip, handle_level_irq); + } set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux); set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW); |