diff options
Diffstat (limited to 'Documentation/devicetree/bindings/powerpc/fsl/diu.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/powerpc/fsl/diu.txt | 16 |
1 files changed, 1 insertions, 15 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/diu.txt b/Documentation/devicetree/bindings/powerpc/fsl/diu.txt index fa902c8..b66cb6d 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/diu.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/diu.txt @@ -6,11 +6,7 @@ drive DVI monitors. Required properties: - compatible : should be "fsl,diu" or "fsl,mpc5121-diu". - reg : should contain at least address and length of the DIU register - set. The address and length for pixel clock register is optional, it's - not needed for the platforms with the pixel clock setting function, such - as P1022, MPC8610, MPC5121; for the platform without clock setting function, - the pixel clock register and settings in 'pixclk' node work together to - provide the pixel clock setting in the diu driver. + set. - interrupts : one DIU interrupt should be described here. - interrupt-parent : the phandle for the interrupt controller that services interrupts for this device. @@ -19,8 +15,6 @@ Optional properties: - edid : verbatim EDID data block describing attached display. Data from the detailed timing descriptor will be used to program the display controller. -- pixclk : the pixel clock register setting, includeing PXCKDLYDIR, PXCK - and PXCKDLY. Example (MPC8610HPCD): display@2c000 { @@ -38,11 +32,3 @@ Example for MPC5121: interrupt-parent = <&ipic>; edid = [edid-data]; }; - -Example for T1040: - display:display@180000 { - compatible = "fsl,t1040-diu", "fsl,diu"; - reg = <0x180000 1000 0xfc028 4>; - pixclk = <0 255 0>; - interrupts = <74 2 0 0>; - }; |