diff options
Diffstat (limited to 'arch/m68k/include')
| -rw-r--r-- | arch/m68k/include/asm/m5206sim.h | 4 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m5249sim.h | 6 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m525xsim.h | 4 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m5272sim.h | 8 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m5307sim.h | 6 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m5407sim.h | 6 |
6 files changed, 17 insertions, 17 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h index 6972236..e8bae33 100644 --- a/arch/m68k/include/asm/m5206sim.h +++ b/arch/m68k/include/asm/m5206sim.h @@ -40,8 +40,8 @@ #define MCFSIM_ICR15 0x22 /* Intr Ctrl reg 15 (r/w) */ #endif -#define MCFSIM_IMR 0x36 /* Interrupt Mask reg (r/w) */ -#define MCFSIM_IPR 0x3a /* Interrupt Pend reg (r/w) */ +#define MCFSIM_IMR (MCF_MBAR + 0x36) /* Interrupt Mask */ +#define MCFSIM_IPR (MCF_MBAR + 0x3a) /* Interrupt Pending */ #define MCFSIM_RSR 0x40 /* Reset Status reg (r/w) */ #define MCFSIM_SYPCR 0x41 /* System Protection reg (r/w)*/ diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 7f0c2c3..d0aa7f2 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h @@ -32,9 +32,9 @@ #define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ -#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ -#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ -#define MCFSIM_AVR 0x4b /* Autovector Ctrl reg (r/w) */ +#define MCFSIM_IPR (MCF_MBAR + 0x40) /* Interrupt Pending */ +#define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */ +#define MCFSIM_AVR (MCF_MBAR + 0x4b) /* Autovector Ctrl */ #define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ #define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */ #define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */ diff --git a/arch/m68k/include/asm/m525xsim.h b/arch/m68k/include/asm/m525xsim.h index 6da24f6..0d6d192 100644 --- a/arch/m68k/include/asm/m525xsim.h +++ b/arch/m68k/include/asm/m525xsim.h @@ -31,8 +31,8 @@ #define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */ #define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ -#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ -#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ +#define MCFSIM_IPR (MCF_MBAR + 0x40) /* Interrupt Pending */ +#define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */ #define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ #define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */ #define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */ diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h index a58f176..378a6d9 100644 --- a/arch/m68k/include/asm/m5272sim.h +++ b/arch/m68k/include/asm/m5272sim.h @@ -32,10 +32,10 @@ #define MCFSIM_ICR3 0x28 /* Intr Ctrl reg 3 (r/w) */ #define MCFSIM_ICR4 0x2c /* Intr Ctrl reg 4 (r/w) */ -#define MCFSIM_ISR 0x30 /* Interrupt Source reg (r/w) */ -#define MCFSIM_PITR 0x34 /* Interrupt Transition (r/w) */ -#define MCFSIM_PIWR 0x38 /* Interrupt Wakeup reg (r/w) */ -#define MCFSIM_PIVR 0x3f /* Interrupt Vector reg (r/w( */ +#define MCFSIM_ISR (MCF_MBAR + 0x30) /* Intr Source */ +#define MCFSIM_PITR (MCF_MBAR + 0x34) /* Intr Transition */ +#define MCFSIM_PIWR (MCF_MBAR + 0x38) /* Intr Wakeup */ +#define MCFSIM_PIVR (MCF_MBAR + 0x3f) /* Intr Vector */ #define MCFSIM_WRRR 0x280 /* Watchdog reference (r/w) */ #define MCFSIM_WIRR 0x284 /* Watchdog interrupt (r/w) */ diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index 3bc3ada..255f7f3 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -31,9 +31,9 @@ #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ #define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/ #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ -#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ -#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ -#define MCFSIM_AVR 0x4b /* Autovector Ctrl reg (r/w) */ +#define MCFSIM_IPR (MCF_MBAR + 0x40) /* Interrupt Pend */ +#define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */ +#define MCFSIM_AVR (MCF_MBAR + 0x4b) /* Autovector Ctrl */ #define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ #define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */ #define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */ diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h index 79f58dd..afdd563 100644 --- a/arch/m68k/include/asm/m5407sim.h +++ b/arch/m68k/include/asm/m5407sim.h @@ -31,9 +31,9 @@ #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ #define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/ #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ -#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ -#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ -#define MCFSIM_AVR 0x4b /* Autovector Ctrl reg (r/w) */ +#define MCFSIM_IPR (MCF_MBAR + 0x40) /* Interrupt Pending */ +#define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */ +#define MCFSIM_AVR (MCF_MBAR + 0x4b) /* Autovector Ctrl */ #define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ #define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */ #define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */ |