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-rw-r--r--arch/powerpc/boot/dts/fsl/t1023si-post.dtsi564
-rw-r--r--arch/powerpc/boot/dts/fsl/t1024si-post.dtsi90
-rw-r--r--arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi97
-rw-r--r--arch/powerpc/boot/dts/t1023qds.dts47
-rw-r--r--arch/powerpc/boot/dts/t1024qds-usdpaa-capwap.dts112
-rw-r--r--arch/powerpc/boot/dts/t1024qds-usdpaa.dts92
-rw-r--r--arch/powerpc/boot/dts/t1024qds.dts90
-rw-r--r--arch/powerpc/boot/dts/t1024rdb-usdpaa-capwap.dts112
-rw-r--r--arch/powerpc/boot/dts/t1024rdb-usdpaa.dts93
-rw-r--r--arch/powerpc/boot/dts/t1024rdb.dts324
-rw-r--r--arch/powerpc/boot/dts/t102xqds.dtsi449
-rw-r--r--arch/powerpc/boot/dts/t1040rdb-dsar.dts2
-rw-r--r--arch/powerpc/boot/dts/t1040rdb.dts2
-rw-r--r--arch/powerpc/boot/dts/t1042rdb.dts2
-rw-r--r--arch/powerpc/boot/dts/t1042rdb_pi-dsar.dts2
-rw-r--r--arch/powerpc/boot/dts/t1042rdb_pi.dts2
16 files changed, 2075 insertions, 5 deletions
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
new file mode 100644
index 0000000..00a1db9
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -0,0 +1,564 @@
+/*
+ * T1023 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&ifc {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc", "simple-bus";
+ interrupts = <25 2 0 0>;
+};
+
+&pci0 {
+ compatible = "fsl,t1024-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0x0 0xff>;
+ interrupts = <20 2 0 0>;
+ fsl,iommu-parent = <&pamu0>;
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <20 2 0 0>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 40 1 0 0
+ 0000 0 0 2 &mpic 1 1 0 0
+ 0000 0 0 3 &mpic 2 1 0 0
+ 0000 0 0 4 &mpic 3 1 0 0
+ >;
+ };
+};
+
+&pci1 {
+ compatible = "fsl,t1024-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0 0xff>;
+ interrupts = <21 2 0 0>;
+ fsl,iommu-parent = <&pamu0>;
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <21 2 0 0>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 41 1 0 0
+ 0000 0 0 2 &mpic 5 1 0 0
+ 0000 0 0 3 &mpic 6 1 0 0
+ 0000 0 0 4 &mpic 7 1 0 0
+ >;
+ };
+};
+
+&pci2 {
+ compatible = "fsl,t1024-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0x0 0xff>;
+ interrupts = <22 2 0 0>;
+ fsl,iommu-parent = <&pamu0>;
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <22 2 0 0>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 42 1 0 0
+ 0000 0 0 2 &mpic 9 1 0 0
+ 0000 0 0 3 &mpic 10 1 0 0
+ 0000 0 0 4 &mpic 11 1 0 0
+ >;
+ };
+};
+
+&dcsr {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,dcsr", "simple-bus";
+
+ dcsr-epu@0 {
+ compatible = "fsl,t1024-dcsr-epu", "fsl,dcsr-epu";
+ interrupts = <52 2 0 0
+ 84 2 0 0
+ 85 2 0 0>;
+ reg = <0x0 0x1000>;
+ };
+ dcsr-npc {
+ compatible = "fsl,t1024-dcsr-cnpc", "fsl,dcsr-cnpc";
+ reg = <0x1000 0x1000 0x1002000 0x10000>;
+ };
+ dcsr-nxc@2000 {
+ compatible = "fsl,dcsr-nxc";
+ reg = <0x2000 0x1000>;
+ };
+ dcsr-corenet {
+ compatible = "fsl,dcsr-corenet";
+ reg = <0x8000 0x1000 0x1A000 0x1000>;
+ };
+ dcsr-dpaa@9000 {
+ compatible = "fsl,t1024-dcsr-dpaa", "fsl,dcsr-dpaa";
+ reg = <0x9000 0x1000>;
+ };
+ dcsr-ocn@11000 {
+ compatible = "fsl,t1024-dcsr-ocn", "fsl,dcsr-ocn";
+ reg = <0x11000 0x1000>;
+ };
+ dcsr-ddr@12000 {
+ compatible = "fsl,dcsr-ddr";
+ dev-handle = <&ddr1>;
+ reg = <0x12000 0x1000>;
+ };
+ dcsr-nal@18000 {
+ compatible = "fsl,t1024-dcsr-nal", "fsl,dcsr-nal";
+ reg = <0x18000 0x1000>;
+ };
+ dcsr-rcpm@22000 {
+ compatible = "fsl,t1024-dcsr-rcpm", "fsl,dcsr-rcpm";
+ reg = <0x22000 0x1000>;
+ };
+ dcsr-snpc@30000 {
+ compatible = "fsl,t1024-dcsr-snpc", "fsl,dcsr-snpc";
+ reg = <0x30000 0x1000 0x1022000 0x10000>;
+ };
+ dcsr-snpc@31000 {
+ compatible = "fsl,t1024-dcsr-snpc", "fsl,dcsr-snpc";
+ reg = <0x31000 0x1000 0x1042000 0x10000>;
+ };
+ dcsr-cpu-sb-proxy@100000 {
+ compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+ cpu-handle = <&cpu0>;
+ reg = <0x100000 0x1000 0x101000 0x1000>;
+ };
+ dcsr-cpu-sb-proxy@108000 {
+ compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+ cpu-handle = <&cpu1>;
+ reg = <0x108000 0x1000 0x109000 0x1000>;
+ };
+};
+
+&bportals {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ compatible = "simple-bus";
+ bman-portal@0 {
+ cell-index = <0x0>;
+ compatible = "fsl,bman-portal";
+ reg = <0x0 0x4000 0x1000000 0x1000>;
+ interrupts = <105 2 0 0>;
+ };
+ bman-portal@4000 {
+ cell-index = <0x1>;
+ compatible = "fsl,bman-portal";
+ reg = <0x4000 0x4000 0x1001000 0x1000>;
+ interrupts = <107 2 0 0>;
+ };
+ bman-portal@8000 {
+ cell-index = <2>;
+ compatible = "fsl,bman-portal";
+ reg = <0x8000 0x4000 0x1002000 0x1000>;
+ interrupts = <109 2 0 0>;
+ };
+ bman-portal@c000 {
+ cell-index = <0x3>;
+ compatible = "fsl,bman-portal";
+ reg = <0xc000 0x4000 0x1003000 0x1000>;
+ interrupts = <111 2 0 0>;
+ };
+ bman-portal@10000 {
+ cell-index = <0x4>;
+ compatible = "fsl,bman-portal";
+ reg = <0x10000 0x4000 0x1004000 0x1000>;
+ interrupts = <113 2 0 0>;
+ };
+ bman-portal@14000 {
+ cell-index = <0x5>;
+ compatible = "fsl,bman-portal";
+ reg = <0x14000 0x4000 0x1005000 0x1000>;
+ interrupts = <115 2 0 0>;
+ };
+ bman-portal@18000 {
+ cell-index = <0x6>;
+ compatible = "fsl,bman-portal";
+ reg = <0x18000 0x4000 0x1006000 0x1000>;
+ interrupts = <117 2 0 0>;
+ };
+ bman-portal@1c000 {
+ cell-index = <0x7>;
+ compatible = "fsl,bman-portal";
+ reg = <0x1c000 0x4000 0x1007000 0x1000>;
+ interrupts = <119 2 0 0>;
+ };
+ bman-portal@20000 {
+ cell-index = <0x8>;
+ compatible = "fsl,bman-portal";
+ reg = <0x20000 0x4000 0x1008000 0x1000>;
+ interrupts = <121 2 0 0>;
+ };
+ bman-portal@24000 {
+ cell-index = <0x9>;
+ compatible = "fsl,bman-portal";
+ reg = <0x24000 0x4000 0x1009000 0x1000>;
+ interrupts = <123 2 0 0>;
+ };
+};
+
+&qportals {
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ compatible = "simple-bus";
+ qportal0: qman-portal@0 {
+ cell-index = <0x0>;
+ compatible = "fsl,qman-portal";
+ reg = <0x0 0x4000 0x1000000 0x1000>;
+ interrupts = <104 0x2 0 0>;
+ fsl,qman-channel-id = <0x0>;
+ };
+
+ qportal1: qman-portal@4000 {
+ cell-index = <0x1>;
+ compatible = "fsl,qman-portal";
+ reg = <0x4000 0x4000 0x1001000 0x1000>;
+ interrupts = <106 0x2 0 0>;
+ fsl,qman-channel-id = <0x1>;
+ };
+
+ qportal2: qman-portal@8000 {
+ cell-index = <0x2>;
+ compatible = "fsl,qman-portal";
+ reg = <0x8000 0x4000 0x1002000 0x1000>;
+ interrupts = <108 0x2 0 0>;
+ fsl,qman-channel-id = <0x2>;
+ };
+
+ qportal3: qman-portal@c000 {
+ cell-index = <0x3>;
+ compatible = "fsl,qman-portal";
+ reg = <0xc000 0x4000 0x1003000 0x1000>;
+ interrupts = <110 0x2 0 0>;
+ fsl,qman-channel-id = <0x3>;
+ };
+
+ qportal4: qman-portal@10000 {
+ cell-index = <0x4>;
+ compatible = "fsl,qman-portal";
+ reg = <0x10000 0x4000 0x1004000 0x1000>;
+ interrupts = <112 0x2 0 0>;
+ fsl,qman-channel-id = <0x4>;
+ };
+
+ qportal5: qman-portal@14000 {
+ cell-index = <0x5>;
+ compatible = "fsl,qman-portal";
+ reg = <0x14000 0x4000 0x1005000 0x1000>;
+ interrupts = <114 0x2 0 0>;
+ fsl,qman-channel-id = <0x5>;
+ };
+
+ qportal6: qman-portal@18000 {
+ cell-index = <0x6>;
+ compatible = "fsl,qman-portal";
+ reg = <0x18000 0x4000 0x1006000 0x1000>;
+ interrupts = <116 0x2 0 0>;
+ fsl,qman-channel-id = <0x6>;
+ };
+
+ qportal7: qman-portal@1c000 {
+ cell-index = <0x7>;
+ compatible = "fsl,qman-portal";
+ reg = <0x1c000 0x4000 0x1007000 0x1000>;
+ interrupts = <118 0x2 0 0>;
+ fsl,qman-channel-id = <0x7>;
+ };
+
+ qportal8: qman-portal@20000 {
+ cell-index = <0x8>;
+ compatible = "fsl,qman-portal";
+ reg = <0x20000 0x4000 0x1008000 0x1000>;
+ interrupts = <120 0x2 0 0>;
+ fsl,qman-channel-id = <0x8>;
+ };
+
+ qportal9: qman-portal@24000 {
+ cell-index = <0x9>;
+ compatible = "fsl,qman-portal";
+ reg = <0x24000 0x4000 0x1009000 0x1000>;
+ interrupts = <122 0x2 0 0>;
+ fsl,qman-channel-id = <0x9>;
+ };
+
+ qman-ceetm@0 {
+ compatible = "fsl,qman-ceetm";
+ fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
+ fsl,ceetm-sp-range = <0 16>;
+ fsl,ceetm-lni-range = <0 8>;
+ fsl,ceetm-channel-range = <0 8>;
+ };
+};
+
+&soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+
+ soc-sram-error {
+ compatible = "fsl,soc-sram-error";
+ interrupts = <16 2 1 29>;
+ };
+
+ corenet-law@0 {
+ compatible = "fsl,corenet-law";
+ reg = <0x0 0x1000>;
+ fsl,num-laws = <16>;
+ };
+
+ ddr1: memory-controller@8000 {
+ compatible = "fsl,qoriq-memory-controller-v5.0",
+ "fsl,qoriq-memory-controller";
+ reg = <0x8000 0x1000>;
+ interrupts = <16 2 1 23>;
+ };
+
+ cpc: l3-cache-controller@10000 {
+ compatible = "fsl,t1024-l3-cache-controller", "cache";
+ reg = <0x10000 0x1000>;
+ interrupts = <16 2 1 27>;
+ };
+
+ corenet-cf@18000 {
+ compatible = "fsl,corenet2-cf";
+ reg = <0x18000 0x1000>;
+ interrupts = <16 2 1 31>;
+ fsl,ccf-num-csdids = <32>;
+ fsl,ccf-num-snoopids = <32>;
+ };
+
+ iommu@20000 {
+ compatible = "fsl,pamu-v1.0", "fsl,pamu";
+ reg = <0x20000 0x1000>;
+ ranges = <0 0x20000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupts = <
+ 24 2 0 0
+ 16 2 1 30>;
+ pamu0: pamu@0 {
+ reg = <0 0x1000>;
+ fsl,primary-cache-geometry = <128 1>;
+ fsl,secondary-cache-geometry = <16 2>;
+ };
+ };
+
+/include/ "qoriq-mpic.dtsi"
+
+ guts: global-utilities@e0000 {
+ compatible = "fsl,t1024-device-config", "fsl,qoriq-device-config-2.0";
+ reg = <0xe0000 0xe00>;
+ fsl,has-rstcr;
+ fsl,liodn-bits = <12>;
+ };
+
+ clockgen: global-utilities@e1000 {
+ compatible = "fsl,t1024-clockgen", "fsl,qoriq-clockgen-2.0",
+ "fixed-clock";
+ reg = <0xe1000 0x1000>;
+ clock-output-names = "sysclk";
+ #clock-cells = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pll0: pll0@800 {
+ #clock-cells = <1>;
+ reg = <0x800 4>;
+ compatible = "fsl,core-pll-clock";
+ clocks = <&clockgen>;
+ clock-output-names = "pll0", "pll0-div2";
+ };
+ mux0: mux0@0 {
+ #clock-cells = <0>;
+ reg = <0x0 4>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>;
+ clock-names = "pll0_0", "pll0_1";
+ clock-output-names = "cmux0";
+ };
+ mux1: mux1@20 {
+ #clock-cells = <0>;
+ reg = <0x20 4>;
+ compatible = "fsl,core-mux-clock";
+ clocks = <&pll0 0>, <&pll0 1>;
+ clock-names = "pll0_0", "pll0_1";
+ clock-output-names = "cmux1";
+ };
+ };
+
+ rcpm: global-utilities@e2000 {
+ compatible = "fsl,t1024-rcpm", "fsl,qoriq-rcpm-2.0";
+ reg = <0xe2000 0x1000>;
+ };
+
+ sfp: sfp@e8000 {
+ compatible = "fsl,t1024-sfp";
+ reg = <0xe8000 0x1000>;
+ };
+
+ serdes: serdes@ea000 {
+ compatible = "fsl,t1024-serdes";
+ reg = <0xea000 0x4000>;
+ };
+
+ scfg: global-utilities@fc000 {
+ compatible = "fsl,t1024-scfg";
+ reg = <0xfc000 0x1000>;
+ };
+
+/include/ "elo3-dma-0.dtsi"
+/include/ "elo3-dma-1.dtsi"
+
+/include/ "qoriq-espi-0.dtsi"
+ spi@110000 {
+ fsl,espi-num-chipselects = <4>;
+ };
+
+/include/ "qoriq-esdhc-0.dtsi"
+ sdhc@114000 {
+ compatible = "fsl,t1024-esdhc", "fsl,esdhc";
+ fsl,iommu-parent = <&pamu0>;
+ fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
+ sdhci,auto-cmd12;
+ no-1-8-v;
+ sleep = <&rcpm 0x00000080>;
+ };
+/include/ "qoriq-i2c-0.dtsi"
+/include/ "qoriq-i2c-1.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
+/include/ "qoriq-gpio-0.dtsi"
+ gpio@130000 {
+ sleep = <&rcpm 0x00000040>;
+ };
+/include/ "qoriq-gpio-1.dtsi"
+/include/ "qoriq-gpio-2.dtsi"
+/include/ "qoriq-gpio-3.dtsi"
+/include/ "qoriq-usb2-mph-0.dtsi"
+ usb0: usb@210000 {
+ compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
+ fsl,iommu-parent = <&pamu0>;
+ fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
+ phy_type = "utmi";
+ sleep = <&rcpm 0x00000020>;
+ port0;
+ };
+/include/ "qoriq-usb2-dr-0.dtsi"
+ usb1: usb@211000 {
+ compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
+ fsl,iommu-parent = <&pamu0>;
+ fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
+ dr_mode = "host";
+ phy_type = "utmi";
+ sleep = <&rcpm 0x00000010>;
+ };
+/include/ "qoriq-sata2-0.dtsi"
+sata@220000 {
+ fsl,iommu-parent = <&pamu0>;
+ fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
+};
+
+/include/ "qoriq-sec5.0-0.dtsi"
+/include/ "qoriq-qman1.dtsi"
+/include/ "qoriq-bman1.dtsi"
+/include/ "qoriq-fman3-0.dtsi"
+/include/ "qoriq-fman3-0-1g-0.dtsi"
+/include/ "qoriq-fman3-0-1g-1.dtsi"
+/include/ "qoriq-fman3-0-1g-2.dtsi"
+/include/ "qoriq-fman3-0-1g-3.dtsi"
+ fman0: fman@400000 {
+ /* tx - 1g - 0 */
+ port@a8000 {
+ fsl,qman-channel-id = <0x802>;
+ };
+ /* tx - 1g - 1 */
+ port@a9000 {
+ fsl,qman-channel-id = <0x803>;
+ };
+ /* tx - 1g - 2 */
+ port@aa000 {
+ fsl,qman-channel-id = <0x804>;
+ };
+ /* tx - 1g - 3 */
+ port@ab000 {
+ fsl,qman-channel-id = <0x805>;
+ };
+
+ /* offline - 1 */
+ port@82000 {
+ fsl,qman-channel-id = <0x809>;
+ };
+ /* offline - 2 */
+ port@83000 {
+ fsl,qman-channel-id = <0x80a>;
+ };
+ /* offline - 3 */
+ port@84000 {
+ fsl,qman-channel-id = <0x80b>;
+ };
+ /* offline - 4 */
+ port@85000 {
+ fsl,qman-channel-id = <0x80c>;
+ };
+ /* offline - 5 */
+ port@86000 {
+ fsl,qman-channel-id = <0x80d>;
+ };
+ /* offline - 6 */
+ port@87000 {
+ fsl,qman-channel-id = <0x80e>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
new file mode 100644
index 0000000..8eae871
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
@@ -0,0 +1,90 @@
+/*
+ * T1024 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t1023si-post.dtsi"
+
+&soc {
+/include/ "qoriq-tdm1.0.dtsi"
+
+ display:display@180000 {
+ compatible = "fsl,t1024-diu", "fsl,diu";
+ reg = <0x180000 1000>;
+ interrupts = <74 2 0 0>;
+ };
+};
+
+&qe {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "qe";
+ compatible = "fsl,qe";
+ fsl,qe-num-riscs = <1>;
+ fsl,qe-num-snums = <28>;
+
+ qeic: interrupt-controller@80 {
+ interrupt-controller;
+ compatible = "fsl,qe-ic";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x80 0x80>;
+ interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
+ };
+
+ ucc@2000 {
+ cell-index = <1>;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
+ };
+
+ ucc@2200 {
+ cell-index = <3>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
+ };
+
+ muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
+ ranges = <0x0 0x10000 0x6000>;
+
+ data-only@0 {
+ compatible = "fsl,qe-muram-data",
+ "fsl,cpm-muram-data";
+ reg = <0x0 0x6000>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
new file mode 100644
index 0000000..e2b27b9
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
@@ -0,0 +1,97 @@
+/*
+ * T1024/T1023 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/include/ "e5500_power_isa.dtsi"
+
+/ {
+ compatible = "fsl,T104x";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ ccsr = &soc;
+ dcsr = &dcsr;
+
+ dma0 = &dma0;
+ dma1 = &dma1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ usb0 = &usb0;
+ usb1 = &usb1;
+ sdhc = &sdhc;
+
+ crypto = &crypto;
+ qman = &qman;
+ bman = &bman;
+ fman0 = &fman0;
+ ethernet0 = &fm1mac1;
+ ethernet1 = &fm1mac2;
+ ethernet2 = &fm1mac3;
+ ethernet3 = &fm1mac4;
+ vga = &display;
+ display = &display;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e5500@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clocks = <&mux0>;
+ next-level-cache = <&L2_1>;
+ L2_1: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu1: PowerPC,e5500@1 {
+ device_type = "cpu";
+ reg = <1>;
+ clocks = <&mux1>;
+ next-level-cache = <&L2_2>;
+ L2_2: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/t1023qds.dts b/arch/powerpc/boot/dts/t1023qds.dts
new file mode 100644
index 0000000..b975a8b
--- /dev/null
+++ b/arch/powerpc/boot/dts/t1023qds.dts
@@ -0,0 +1,47 @@
+/*
+ * T1023 QDS Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/t102xsi-pre.dtsi"
+/include/ "t102xqds.dtsi"
+
+/ {
+ model = "fsl,T1023QDS";
+ compatible = "fsl,T1023QDS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+};
+
+/include/ "fsl/t1023si-post.dtsi"
+/include/ "fsl/qoriq-dpaa-res3.dtsi"
diff --git a/arch/powerpc/boot/dts/t1024qds-usdpaa-capwap.dts b/arch/powerpc/boot/dts/t1024qds-usdpaa-capwap.dts
new file mode 100644
index 0000000..979db19
--- /dev/null
+++ b/arch/powerpc/boot/dts/t1024qds-usdpaa-capwap.dts
@@ -0,0 +1,112 @@
+/*
+ * T1024QDS CAPWAP Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t1024qds.dts"
+
+/ {
+ bp7: buffer-pool@7 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <7>;
+ fsl,bpool-ethernet-cfg = <0 16384 0 2112 0 0>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ fsl,bpool-ethernet-seeds = <0xdeadbeef>;
+ };
+
+ fsl,dpaa {
+ /* This DPAA port is used as CAPWAP Ethernet Port, which can be set when running
+ the use case by "-a 1,2", "1" is MAC ID, "2" is MAC type, the valid value of
+ type is: "1"--1G MAC, "2"--10G MAC. */
+ ethernet@0 {
+ compatible = "fsl,t1024-dpa-ethernet-shared", "fsl,dpa-ethernet-shared";
+ fsl,bman-buffer-pools = <&bp7>;
+ fsl,qman-frame-queues-rx = <0x50 1 0x51 1 0x2000 3>;
+ fsl,qman-frame-queues-tx = <0x70 1 0x71 1 0x3000 8>;
+ };
+ /* The following two ports are used as Non-CAPWAP Ethernet ports, and should be
+ uncommented when the case running in Mode 2, using the following parameters
+ to set when running the case: "-s 3,1 -u 4,1 -m 2", "-m 2" means the case
+ runs in mode 2, "-s" and "-u" sperify two DPAA port, format is "MAC-ID,type",the
+ valid value of type is: "1"--1G MAC, "2"--10G MAC*/
+/*
+ ethernet@2 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7>;
+ fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
+ fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7>;
+ fsl,qman-frame-queues-rx = <0x60 1 0x61 1 >;
+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1 >;
+ };
+*/
+ /* The following OP is used as outbound OP*/
+ dpa-fman0-oh@3 {
+ compatible = "fsl,dpa-oh";
+ fsl,bman-buffer-pools = <&bp7>;
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x52 1 0x53 1>;
+ fsl,fman-oh-port = <&fman0_oh3>;
+ };
+ /* The following OP is used as inbound OP*/
+ dpa-fman0-oh@4 {
+ compatible = "fsl,dpa-oh";
+ fsl,bman-buffer-pools = <&bp7>;
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x54 1 0x55 1>;
+ fsl,fman-oh-port = <&fman0_oh4>;
+ };
+ };
+
+ soc: soc@ffe000000 {
+ fman0: fman@400000 {
+ fman-extended-args {
+ compatible = "fsl,fman-extended-args";
+ cell-index = <0>;
+ /* Set 128bytes manip extra space for outbound(frgamentation) OP */
+ args0 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-op-extended-args";
+ /* manip_extra_space, data_align */
+ buffer-layout = <0x80 0x40>;
+ };
+ };
+
+ };
+ };
+
+};
diff --git a/arch/powerpc/boot/dts/t1024qds-usdpaa.dts b/arch/powerpc/boot/dts/t1024qds-usdpaa.dts
new file mode 100644
index 0000000..340c6a6
--- /dev/null
+++ b/arch/powerpc/boot/dts/t1024qds-usdpaa.dts
@@ -0,0 +1,92 @@
+/*
+ * T1024QDS USDPAA Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t1024qds.dts"
+
+/ {
+ /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding,
+ * because apps seed these pools with buffers allocated at
+ * run-time.
+ * HOWEVER, the kernel driver requires the buffer-size so
+ * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets
+ * things if the base-address is zero (hence the 0xdeadbeef
+ * values).
+ */
+ bp7: buffer-pool@7 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <7>;
+ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
+ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+ };
+ bp8: buffer-pool@8 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <8>;
+ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp9: buffer-pool@9 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <9>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ fsl,dpaa {
+ ethernet@0 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>;
+ fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
+ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
+ };
+ dpa-fman0-oh@1 {
+ compatible = "fsl,dpa-oh";
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x68 1 0x69 1>;
+ fsl,fman-oh-port = <&fman0_oh1>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/t1024qds.dts b/arch/powerpc/boot/dts/t1024qds.dts
new file mode 100644
index 0000000..edff95a
--- /dev/null
+++ b/arch/powerpc/boot/dts/t1024qds.dts
@@ -0,0 +1,90 @@
+/*
+ * T1024 QDS Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/t102xsi-pre.dtsi"
+/include/ "t102xqds.dtsi"
+
+/ {
+ model = "fsl,T1024QDS";
+ compatible = "fsl,T1024QDS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ qe: qe@ffe140000 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ tdma: ucc@2000 {
+ compatible = "fsl,ucc-tdm";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ };
+
+ serial: ucc@2200 {
+ device_type = "serial";
+ compatible = "ucc_uart";
+ port-number = <1>;
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ };
+ };
+};
+
+/include/ "fsl/t1024si-post.dtsi"
+/include/ "fsl/qoriq-dpaa-res3.dtsi"
diff --git a/arch/powerpc/boot/dts/t1024rdb-usdpaa-capwap.dts b/arch/powerpc/boot/dts/t1024rdb-usdpaa-capwap.dts
new file mode 100644
index 0000000..33d2a27
--- /dev/null
+++ b/arch/powerpc/boot/dts/t1024rdb-usdpaa-capwap.dts
@@ -0,0 +1,112 @@
+/*
+ * T1024RDB CAPWAP Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t1024rdb.dts"
+
+/ {
+ bp7: buffer-pool@7 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <7>;
+ fsl,bpool-ethernet-cfg = <0 16384 0 2112 0 0>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ fsl,bpool-ethernet-seeds = <0xdeadbeef>;
+ };
+
+ fsl,dpaa {
+ /* This DPAA port is used as CAPWAP Ethernet Port, which can be set when running
+ the use case by "-a 1,2", "1" is MAC ID, "2" is MAC type, the valid value of
+ type is: "1"--1G MAC, "2"--10G MAC. */
+ ethernet@0 {
+ compatible = "fsl,t1024-dpa-ethernet-shared", "fsl,dpa-ethernet-shared";
+ fsl,bman-buffer-pools = <&bp7>;
+ fsl,qman-frame-queues-rx = <0x50 1 0x51 1 0x2000 3>;
+ fsl,qman-frame-queues-tx = <0x70 1 0x71 1 0x3000 8>;
+ };
+ /* The following two ports are used as Non-CAPWAP Ethernet ports, and should be
+ uncommented when the case running in Mode 2, using the following parameters
+ to set when running the case: "-s 3,1 -u 4,1 -m 2", "-m 2" means the case
+ runs in mode 2, "-s" and "-u" sperify two DPAA port, format is "MAC-ID,type",the
+ valid value of type is: "1"--1G MAC, "2"--10G MAC*/
+/*
+ ethernet@2 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7>;
+ fsl,qman-frame-queues-rx = <0x58 1 0x59 1>;
+ fsl,qman-frame-queues-tx = <0x72 1 0x73 1>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7>;
+ fsl,qman-frame-queues-rx = <0x60 1 0x61 1 >;
+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1 >;
+ };
+*/
+ /* The following OP is used as outbound OP*/
+ dpa-fman0-oh@3 {
+ compatible = "fsl,dpa-oh";
+ fsl,bman-buffer-pools = <&bp7>;
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x52 1 0x53 1>;
+ fsl,fman-oh-port = <&fman0_oh3>;
+ };
+ /* The following OP is used as inbound OP*/
+ dpa-fman0-oh@4 {
+ compatible = "fsl,dpa-oh";
+ fsl,bman-buffer-pools = <&bp7>;
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x54 1 0x55 1>;
+ fsl,fman-oh-port = <&fman0_oh4>;
+ };
+ };
+
+ soc: soc@ffe000000 {
+ fman0: fman@400000 {
+ fman-extended-args {
+ compatible = "fsl,fman-extended-args";
+ cell-index = <0>;
+ /* Set 128bytes manip extra space for outbound(frgamentation) OP */
+ args0 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-op-extended-args";
+ /* manip_extra_space, data_align */
+ buffer-layout = <0x80 0x40>;
+ };
+ };
+
+ };
+ };
+
+};
diff --git a/arch/powerpc/boot/dts/t1024rdb-usdpaa.dts b/arch/powerpc/boot/dts/t1024rdb-usdpaa.dts
new file mode 100644
index 0000000..7f0572e
--- /dev/null
+++ b/arch/powerpc/boot/dts/t1024rdb-usdpaa.dts
@@ -0,0 +1,93 @@
+/*
+ * T1024RDB Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t1024rdb.dts"
+
+/ {
+ /* NB: "bpool-ethernet-seeds" is not set to avoid buffer seeding,
+ * because apps seed these pools with buffers allocated at
+ * run-time.
+ * HOWEVER, the kernel driver requires the buffer-size so
+ * "fsl,bpool-ethernet-cfg" is set. It also mis-interprets
+ * things if the base-address is zero (hence the 0xdeadbeef
+ * values).
+ */
+ bp7: buffer-pool@7 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <7>;
+ fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>;
+ fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>;
+ };
+ bp8: buffer-pool@8 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <8>;
+ fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+ bp9: buffer-pool@9 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <9>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ fsl,dpaa {
+ ethernet@0 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>;
+ fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>;
+ };
+
+ ethernet@2 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x54 1 0x55 1>;
+ fsl,qman-frame-queues-tx = <0x74 1 0x75 1>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t1024-dpa-ethernet-init", "fsl,dpa-ethernet-init";
+ fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>;
+ fsl,qman-frame-queues-rx = <0x56 1 0x57 1>;
+ fsl,qman-frame-queues-tx = <0x76 1 0x77 1>;
+ };
+ dpa-fman0-oh@1 {
+ compatible = "fsl,dpa-oh";
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x68 1 0x69 1>;
+ fsl,fman-oh-port = <&fman0_oh1>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/t1024rdb.dts b/arch/powerpc/boot/dts/t1024rdb.dts
new file mode 100644
index 0000000..7f8507a
--- /dev/null
+++ b/arch/powerpc/boot/dts/t1024rdb.dts
@@ -0,0 +1,324 @@
+/*
+ * T1024 RDB Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "fsl/t102xsi-pre.dtsi"
+
+/ {
+ model = "fsl,T1024RDB";
+ compatible = "fsl,T1024RDB";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ ifc: localbus@ffe124000 {
+ reg = <0xf 0xfe124000 0 0x2000>;
+ ranges = <0 0 0xf 0xe8000000 0x08000000
+ 2 0 0xf 0xff800000 0x00010000
+ 3 0 0xf 0xffdf0000 0x00008000>;
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc-nand";
+ reg = <0x2 0x0 0x10000>;
+ };
+
+ board-control@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,t1024-cpld", "fsl,deepsleep-cpld";
+ reg = <3 0 0x300>;
+ ranges = <0 3 0 0x300>;
+ bank-width = <1>;
+ device-width = <1>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ dcsr: dcsr@f00000000 {
+ ranges = <0x00000000 0xf 0x00000000 0x01072000>;
+ };
+
+ bportals: bman-portals@ff4000000 {
+ ranges = <0x0 0xf 0xf4000000 0x2000000>;
+ };
+
+ qportals: qman-portals@ff6000000 {
+ ranges = <0x0 0xf 0xf6000000 0x2000000>;
+ };
+
+ soc: soc@ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ spi@110000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,n25q512a";
+ reg = <0>;
+ spi-max-frequency = <10000000>; /* input clock */
+ };
+
+ slic@1 {
+ compatible = "maxim,ds26522";
+ reg = <1>;
+ spi-max-frequency = <2000000>;
+ };
+
+ slic@2 {
+ compatible = "maxim,ds26522";
+ reg = <2>;
+ spi-max-frequency = <2000000>;
+ };
+ };
+
+ i2c@118000 {
+ adt7461@4c {
+ /* Thermal Monitor */
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+
+ eeprom@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ interrupts = <0x1 0x1 0 0>;
+ };
+ };
+
+ i2c@118100 {
+ pca9546@77 {
+ compatible = "nxp,pca9546";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ fman0: fman@400000 {
+ sleep = <&rcpm 0x00000008>;
+
+ fm1mac1: ethernet@e0000 {
+ phy-handle = <&xg_aqr105_phy3>;
+ phy-connection-type = "xgmii";
+ sleep = <&rcpm 0x80000000>;
+ };
+
+ fm1mac2: ethernet@e2000 {
+ sleep = <&rcpm 0x40000000>;
+ };
+
+ fm1mac3: ethernet@e4000 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii";
+ sleep = <&rcpm 0x20000000>;
+ };
+
+ fm1mac4: ethernet@e6000 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii";
+ sleep = <&rcpm 0x10000000>;
+ };
+
+ mdio0: mdio@fc000 {
+ rgmii_phy1: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+ rgmii_phy2: ethernet-phy@6 {
+ reg = <0x6>;
+ };
+ };
+
+ xmdio0: mdio@fd000 {
+ xg_aqr105_phy3: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x1>;
+ };
+ };
+ };
+ };
+
+ /* bp dts definition is borrowed from other USDPAA dts */
+ bp6: buffer-pool@6 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <6>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ fsl,dpaa {
+ compatible = "fsl,t1024-dpaa", "fsl,dpaa";
+ ethernet@0 {
+ compatible = "fsl,t1024-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1mac1>;
+ };
+ ethernet@1 {
+ compatible = "fsl,t1024-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1mac2>;
+ };
+ ethernet@2 {
+ compatible = "fsl,t1024-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1mac3>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t1024-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1mac4>;
+ };
+ /* Enable one offline port as default to support HW based LAG */
+ dpa-fman0-oh@2 {
+ compatible = "fsl,dpa-oh";
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x68 1 0x69 1>;
+ fsl,bman-buffer-pools = <&bp6>;
+ fsl,qman-frame-queues-tx = <0x90 8>;
+ fsl,fman-oh-port = <&fman0_oh2>;
+ };
+ };
+
+ qe: qe@ffe139999 {
+ ranges = <0x0 0xf 0xfe140000 0x40000>;
+ reg = <0xf 0xfe140000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+
+ si1: si@700 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,qe-si";
+ reg = <0x700 0x80>;
+ };
+
+ siram1: siram@1000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-siram";
+ reg = <0x1000 0x800>;
+ };
+
+ tdma: ucc@2000 {
+ compatible = "fsl,ucc-tdm";
+ rx-clock-name = "clk8";
+ tx-clock-name = "clk9";
+ fsl,rx-sync-clock = "rsync_pin";
+ fsl,tx-sync-clock = "tsync_pin";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <0>;
+ fsl,siram-entry-id = <0>;
+ };
+
+ ucc@2200 {
+ compatible = "fsl,ucc_hdlc";
+ rx-clock-name = "brg2";
+ tx-clock-name = "brg2";
+ fsl,rx-sync-clock = "none";
+ fsl,tx-sync-clock = "none";
+ fsl,tx-timeslot = <0xfffffffe>;
+ fsl,rx-timeslot = <0xfffffffe>;
+ fsl,tdm-framer-type = "e1";
+ fsl,tdm-mode = "normal";
+ fsl,tdm-id = <1>;
+ fsl,siram-entry-id = <2>;
+ fsl,inter-loopback;
+ };
+ };
+
+ pci0: pcie@ffe240000 {
+ reg = <0xf 0xfe240000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x10000000
+ 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x10000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci1: pcie@ffe250000 {
+ reg = <0xf 0xfe250000 0 0x10000>;
+ ranges = <0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x10000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci2: pcie@ffe260000 {
+ reg = <0xf 0xfe260000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x10000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+};
+
+/include/ "fsl/t1024si-post.dtsi"
+/include/ "fsl/qoriq-dpaa-res3.dtsi"
diff --git a/arch/powerpc/boot/dts/t102xqds.dtsi b/arch/powerpc/boot/dts/t102xqds.dtsi
new file mode 100644
index 0000000..03882ca
--- /dev/null
+++ b/arch/powerpc/boot/dts/t102xqds.dtsi
@@ -0,0 +1,449 @@
+/*
+ * T1024/T1023 QDS Device Tree Source
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/ {
+ model = "fsl,T1024QDS";
+ compatible = "fsl,T1024QDS";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ emi1_rgmii0 = &t1024mdio0;
+ emi1_rgmii1 = &t1024mdio1;
+ emi1_slot2 = &t1024mdio2;
+ emi1_slot3 = &t1024mdio3;
+ emi1_slot4 = &t1024mdio4;
+ emi1_slot5 = &t1024mdio5;
+ rgmii_phy1 = &rgmii_phy1;
+ rgmii_phy2 = &rgmii_phy2;
+ qsgmii_phy_p1 = &qsgmii_phy_p1;
+ qsgmii_phy_p2 = &qsgmii_phy_p2;
+ qsgmii_phy_p3 = &qsgmii_phy_p3;
+ qsgmii_phy_p4 = &qsgmii_phy_p4;
+ sgmii_aqr105_phy_s3 = &sgmii_aqr105_phy_s3;
+ sgmii_aqr105_phy_s4 = &sgmii_aqr105_phy_s4;
+ sgmii_aqr105_phy_s5 = &sgmii_aqr105_phy_s5;
+ sgmii_vsc8234_phy_s3 = &sgmii_vsc8234_phy_s3;
+ sgmii_vsc8234_phy_s4 = &sgmii_vsc8234_phy_s4;
+ sgmii_vsc8234_phy_s5 = &sgmii_vsc8234_phy_s5;
+ };
+
+ ifc: localbus@ffe124000 {
+ reg = <0xf 0xfe124000 0 0x2000>;
+ ranges = <0 0 0xf 0xe8000000 0x08000000
+ 2 0 0xf 0xff800000 0x00010000
+ 3 0 0xf 0xffdf0000 0x00008000>;
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
+ nand@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ifc-nand";
+ reg = <0x2 0x0 0x10000>;
+ };
+
+ board-control@3,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,tetra-fpga", "fsl,fpga-qixis";
+ reg = <3 0 0x300>;
+ ranges = <0 3 0 0x300>;
+
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-mmioreg", "mdio-mux";
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x54 1>; /* BRDCFG4 */
+ mux-mask = <0xe0>; /* EMI1 */
+
+ /* On-board RGMII1 PHY */
+ t1024mdio0: mdio@0 {
+ reg = <0x00>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rgmii_phy1: ethernet-phy@1 { /* MAC4 */
+ reg = <0x1>;
+ };
+ };
+
+ /* On-board RGMII2 PHY */
+ t1024mdio1: mdio@20 {
+ reg = <0x20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ rgmii_phy2: ethernet-phy@2 { /* MAC3 */
+ reg = <0x2>;
+ };
+ };
+
+ /* Slot 2 */
+ t1024mdio2: mdio@60 {
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ qsgmii_phy_p1: ethernet-phy@8 {
+ reg = <0x8>;
+ };
+ qsgmii_phy_p2: ethernet-phy@9 {
+ reg = <0x9>;
+ };
+ qsgmii_phy_p3: ethernet-phy@a {
+ reg = <0xa>;
+ };
+ qsgmii_phy_p4: ethernet-phy@b {
+ reg = <0xb>;
+ };
+ };
+
+ /* Slot 3 */
+ t1024mdio3: mdio@80 {
+ reg = <0x80>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sgmii_vsc8234_phy_s3: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+
+ sgmii_aqr105_phy_s3: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+ };
+
+ /* Slot 4 */
+ t1024mdio4: mdio@a0 {
+ reg = <0xa0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sgmii_vsc8234_phy_s4: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+
+ sgmii_aqr105_phy_s4: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+ };
+
+ /* Slot 5 */
+ t1024mdio5: mdio@c0 {
+ reg = <0xc0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sgmii_vsc8234_phy_s5: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+
+ sgmii_aqr105_phy_s5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ };
+ };
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ dcsr: dcsr@f00000000 {
+ ranges = <0x00000000 0xf 0x00000000 0x01072000>;
+ };
+
+ bportals: bman-portals@ff4000000 {
+ ranges = <0x0 0xf 0xf4000000 0x2000000>;
+ };
+
+ qportals: qman-portals@ff6000000 {
+ ranges = <0x0 0xf 0xf6000000 0x2000000>;
+ };
+
+ soc: soc@ffe000000 {
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+ spi@110000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,n25q128a11"; /* 16MB */
+ reg = <0>;
+ spi-max-frequency = <10000000>; /* input clock */
+ };
+
+ flash@1 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "sst,sst25wf040"; /* 512KB */
+ reg = <1>;
+ spi-max-frequency = <10000000>; /* input clock */
+ };
+
+ flash@2 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "eon,en25s64"; /* 8MB */
+ reg = <2>;
+ spi-max-frequency = <10000000>; /* input clock */
+ };
+
+ slic@2 {
+ compatible = "maxim,ds26522";
+ reg = <2>;
+ spi-max-frequency = <2000000>;
+ };
+
+ slic@3 {
+ compatible = "maxim,ds26522";
+ reg = <3>;
+ spi-max-frequency = <2000000>;
+ };
+ };
+
+ i2c@118000 {
+ pca9547@77 {
+ compatible = "nxp,pca9547";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+
+ eeprom@50 {
+ compatible = "at24,24c512";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "at24,24c02";
+ reg = <0x51>;
+ };
+
+ eeprom@57 {
+ compatible = "at24,24c02";
+ reg = <0x57>;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+
+ ina220@40 {
+ compatible = "ti,ina220";
+ reg = <0x40>;
+ shunt-resistor = <1000>;
+ };
+
+ ina220@41 {
+ compatible = "ti,ina220";
+ reg = <0x41>;
+ shunt-resistor = <1000>;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+
+ adt7461@4c {
+ /* Thermal Monitor */
+ compatible = "adi,adt7461";
+ reg = <0x4c>;
+ };
+
+ eeprom@55 {
+ compatible = "at24,24c02";
+ reg = <0x55>;
+ };
+
+ eeprom@56 {
+ compatible = "at24,24c512";
+ reg = <0x56>;
+ };
+
+ eeprom@57 {
+ compatible = "at24,24c512";
+ reg = <0x57>;
+ };
+ };
+ };
+ rtc@68 {
+ compatible = "dallas,ds3232";
+ reg = <0x68>;
+ interrupts = <0x5 0x1 0 0>;
+ };
+ };
+
+ fman0: fman@400000 {
+ sleep = <&rcpm 0x00000008>;
+
+ fm1mac1: ethernet@e0000 {
+ phy-handle = <&sgmii_aqr105_phy_s5>;
+ phy-connection-type = "sgmii";
+ sleep = <&rcpm 0x80000000>;
+ };
+
+ fm1mac2: ethernet@e2000 {
+ phy-handle = <&sgmii_aqr105_phy_s4>;
+ phy-connection-type = "sgmii";
+ sleep = <&rcpm 0x40000000>;
+ };
+
+ fm1mac3: ethernet@e4000 {
+ phy-handle = <&sgmii_vsc8234_phy_s3>;
+ phy-connection-type = "sgmii";
+ sleep = <&rcpm 0x20000000>;
+ };
+
+ fm1mac4: ethernet@e6000 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii";
+ sleep = <&rcpm 0x10000000>;
+ };
+
+ mdio0: mdio@fc000 {
+ };
+
+ xmdio0: mdio@fd000 {
+ ethernet-phy@4 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0x4>;
+ };
+ };
+ };
+ };
+ /* bp dts definition is borrowed from other USDPAA dts */
+ bp6: buffer-pool@6 {
+ compatible = "fsl,t1024-bpool", "fsl,bpool";
+ fsl,bpid = <6>;
+ fsl,bpool-ethernet-cfg = <0 0 0 1728 0 0xfeedabba>;
+ fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>;
+ };
+
+ fsl,dpaa {
+ compatible = "fsl,t1024-dpaa", "fsl,dpaa";
+ ethernet@0 {
+ compatible = "fsl,t1024-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1mac1>;
+ };
+ ethernet@1 {
+ compatible = "fsl,t1024-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1mac2>;
+ };
+ ethernet@2 {
+ compatible = "fsl,t1024-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1mac3>;
+ };
+ ethernet@3 {
+ compatible = "fsl,t1024-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1mac4>;
+ };
+ /* Enable one offline port as default to support HW based LAG */
+ dpa-fman0-oh@2 {
+ compatible = "fsl,dpa-oh";
+ /* Define frame queues for the OH port*/
+ /* <OH Rx error, OH Rx default> */
+ fsl,qman-frame-queues-oh = <0x68 1 0x69 1>;
+ fsl,bman-buffer-pools = <&bp6>;
+ fsl,qman-frame-queues-tx = <0x90 8>;
+ fsl,fman-oh-port = <&fman0_oh2>;
+ };
+ };
+
+ pci0: pcie@ffe240000 {
+ reg = <0xf 0xfe240000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x10000000
+ 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x10000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci1: pcie@ffe250000 {
+ reg = <0xf 0xfe250000 0 0x10000>;
+ ranges = <0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x10000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci2: pcie@ffe260000 {
+ reg = <0xf 0xfe260000 0 0x10000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x10000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/t1040rdb-dsar.dts b/arch/powerpc/boot/dts/t1040rdb-dsar.dts
index b550858..6a27686 100644
--- a/arch/powerpc/boot/dts/t1040rdb-dsar.dts
+++ b/arch/powerpc/boot/dts/t1040rdb-dsar.dts
@@ -115,7 +115,7 @@
cpld@3,0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "fsl,t104xrdb-cpld";
+ compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld";
reg = <3 0 0x20>;
ranges = <0 3 0 0x20>;
bank-width = <1>;
diff --git a/arch/powerpc/boot/dts/t1040rdb.dts b/arch/powerpc/boot/dts/t1040rdb.dts
index 2022b19..4d6de1f 100644
--- a/arch/powerpc/boot/dts/t1040rdb.dts
+++ b/arch/powerpc/boot/dts/t1040rdb.dts
@@ -98,7 +98,7 @@
cpld@3,0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "fsl,t104xrdb-cpld";
+ compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld";
reg = <3 0 0x20>;
ranges = <0 3 0 0x20>;
bank-width = <1>;
diff --git a/arch/powerpc/boot/dts/t1042rdb.dts b/arch/powerpc/boot/dts/t1042rdb.dts
index 0f44020..39b591c 100644
--- a/arch/powerpc/boot/dts/t1042rdb.dts
+++ b/arch/powerpc/boot/dts/t1042rdb.dts
@@ -98,7 +98,7 @@
cpld@3,0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "fsl,t104xrdb-cpld";
+ compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld";
reg = <3 0 0x20>;
ranges = <0 3 0 0x20>;
bank-width = <1>;
diff --git a/arch/powerpc/boot/dts/t1042rdb_pi-dsar.dts b/arch/powerpc/boot/dts/t1042rdb_pi-dsar.dts
index b49e583..905374c 100644
--- a/arch/powerpc/boot/dts/t1042rdb_pi-dsar.dts
+++ b/arch/powerpc/boot/dts/t1042rdb_pi-dsar.dts
@@ -115,7 +115,7 @@
cpld@3,0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "fsl,t104xrdb-cpld";
+ compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld";
reg = <3 0 0x20>;
ranges = <0 3 0 0x20>;
bank-width = <1>;
diff --git a/arch/powerpc/boot/dts/t1042rdb_pi.dts b/arch/powerpc/boot/dts/t1042rdb_pi.dts
index 3b5cf98..16dc2fa 100644
--- a/arch/powerpc/boot/dts/t1042rdb_pi.dts
+++ b/arch/powerpc/boot/dts/t1042rdb_pi.dts
@@ -97,7 +97,7 @@
cpld@3,0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "fsl,t104xrdb-cpld";
+ compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld";
reg = <3 0 0x20>;
ranges = <0 3 0 0x20>;
bank-width = <1>;
generated by cgit v0.10.2 at 2024-07-08 13:24:10 (GMT)