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-rw-r--r--arch/powerpc/boot/dts/kuroboxHD.dts18
-rw-r--r--arch/powerpc/boot/dts/kuroboxHG.dts19
-rw-r--r--arch/powerpc/boot/dts/mpc7448hpc2.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts219
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts250
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts4
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts60
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts8
-rw-r--r--arch/powerpc/boot/dts/prpmc2800.dts6
19 files changed, 508 insertions, 104 deletions
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index a983680..1225374 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -33,12 +33,10 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
PowerPC,603e { /* Really 8241 */
device_type = "cpu";
reg = <0>;
- clock-frequency = <bebc200>; /* Fixed by bootwrapper */
- timebase-frequency = <1743000>; /* Fixed by bootwrapper */
- bus-frequency = <0>; /* From bootloader */
+ clock-frequency = <bebc200>; /* Fixed by bootloader */
+ timebase-frequency = <1743000>; /* Fixed by bootloader */
+ bus-frequency = <0>; /* Fixed by bootloader */
/* Following required by dtc but not used */
- i-cache-line-size = <0>;
- d-cache-line-size = <0>;
i-cache-size = <4000>;
d-cache-size = <4000>;
};
@@ -64,11 +62,19 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
fef00000 fef00000 00100000>; /* pci iack */
i2c@80003000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
device_type = "i2c";
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
interrupt-parent = <&mpic>;
+
+ rtc@32 {
+ device_type = "rtc";
+ compatible = "ricoh,rs5c372b";
+ reg = <32>;
+ };
};
serial@80004500 {
@@ -91,7 +97,7 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
interrupt-parent = <&mpic>;
};
- mpic: pic@80040000 {
+ mpic: interrupt-controller@80040000 {
#interrupt-cells = <2>;
#address-cells = <0>;
device_type = "open-pic";
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 5cf42dc..579aa8b 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -33,12 +33,10 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
PowerPC,603e { /* Really 8241 */
device_type = "cpu";
reg = <0>;
- clock-frequency = <fdad680>; /* Fixed by bootwrapper */
- timebase-frequency = <1F04000>; /* Fixed by bootwrapper */
- bus-frequency = <0>; /* From bootloader */
+ clock-frequency = <fdad680>; /* Fixed by bootloader */
+ timebase-frequency = <1F04000>; /* Fixed by bootloader */
+ bus-frequency = <0>; /* Fixed by bootloader */
/* Following required by dtc but not used */
- i-cache-line-size = <0>;
- d-cache-line-size = <0>;
i-cache-size = <4000>;
d-cache-size = <4000>;
};
@@ -64,11 +62,19 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
fef00000 fef00000 00100000>; /* pci iack */
i2c@80003000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
device_type = "i2c";
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
interrupt-parent = <&mpic>;
+
+ rtc@32 {
+ device_type = "rtc";
+ compatible = "ricoh,rs5c372b";
+ reg = <32>;
+ };
};
serial@80004500 {
@@ -91,8 +97,7 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts"
interrupt-parent = <&mpic>;
};
- mpic: pic@80040000 {
- interrupt-parent = <&mpic>;
+ mpic: interrupt-controller@80040000 {
#interrupt-cells = <2>;
#address-cells = <0>;
device_type = "open-pic";
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 0e3d314..b9158eb 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -45,7 +45,7 @@
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
- device_type = "tsi108-bridge";
+ device_type = "tsi-bridge";
ranges = <00000000 c0000000 00010000>;
reg = <c0000000 00010000>;
bus-frequency = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index a1533cc..c5adbe4 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -178,7 +178,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 4fc0c4d..f158ed7 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -154,7 +154,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 447c03f..7c4beff 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -123,7 +123,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index ae9bca5..502f47c 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -197,7 +197,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
@@ -222,7 +222,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8600 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index f636528..0b83871 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -154,7 +154,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8600 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 310e877..4810997 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -241,7 +241,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
@@ -301,7 +301,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8600 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 1e914f3..e3f7c12 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -169,7 +169,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
- compatible = "83xx";
+ compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 364a969..fc8dff9 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -258,7 +258,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8000 1000>;
- compatible = "85xx";
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 070206f..fb0b647 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -193,7 +193,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8000 1000>;
- compatible = "85xx";
+ compatible = "fsl,mpc8540-pci";
device_type = "pci";
i8259@19000 {
@@ -230,7 +230,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <9000 1000>;
- compatible = "85xx";
+ compatible = "fsl,mpc8540-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 8285925..4680e20 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -104,6 +104,7 @@
interrupts = <1d 2 1e 2 22 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
};
ethernet@26000 {
@@ -117,6 +118,7 @@
interrupts = <1f 2 20 2 21 2>;
interrupt-parent = <&mpic>;
phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
};
serial@4500 {
@@ -137,6 +139,223 @@
interrupt-parent = <&mpic>;
};
+ pci@8000 {
+ compatible = "fsl,mpc8540-pci";
+ device_type = "pci";
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x11 J17 Slot 1 */
+ 8800 0 0 1 &mpic 2 1
+ 8800 0 0 2 &mpic 3 1
+ 8800 0 0 3 &mpic 4 1
+ 8800 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x12 J16 Slot 2 */
+
+ 9000 0 0 1 &mpic 3 1
+ 9000 0 0 2 &mpic 4 1
+ 9000 0 0 3 &mpic 2 1
+ 9000 0 0 4 &mpic 1 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 80000000 80000000 0 10000000
+ 01000000 0 00000000 e2000000 0 00800000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8000 1000>;
+ };
+
+ pcie@9000 {
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <9000 1000>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 90000000 90000000 0 10000000
+ 01000000 0 00000000 e3000000 0 00800000>;
+ clock-frequency = <1fca055>;
+ interrupt-parent = <&mpic>;
+ interrupts = <1a 2>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 4 1
+ 0000 0 0 2 &mpic 5 1
+ 0000 0 0 3 &mpic 6 1
+ 0000 0 0 4 &mpic 7 1
+ >;
+ };
+
+ pcie@a000 {
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <a000 1000>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 a0000000 a0000000 0 10000000
+ 01000000 0 00000000 e2800000 0 00800000>;
+ clock-frequency = <1fca055>;
+ interrupt-parent = <&mpic>;
+ interrupts = <19 2>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 0 1
+ 0000 0 0 2 &mpic 1 1
+ 0000 0 0 3 &mpic 2 1
+ 0000 0 0 4 &mpic 3 1
+ >;
+ };
+
+ pcie@b000 {
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <b000 1000>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 b0000000 b0000000 0 10000000
+ 01000000 0 00000000 e3800000 0 00800000>;
+ clock-frequency = <1fca055>;
+ interrupt-parent = <&mpic>;
+ interrupts = <1b 2>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ // IDSEL 0x1a
+ d000 0 0 1 &i8259 6 2
+ d000 0 0 2 &i8259 3 2
+ d000 0 0 3 &i8259 4 2
+ d000 0 0 4 &i8259 5 2
+
+ // IDSEL 0x1b
+ d800 0 0 1 &i8259 5 2
+ d800 0 0 2 &i8259 0 0
+ d800 0 0 3 &i8259 0 0
+ d800 0 0 4 &i8259 0 0
+
+ // IDSEL 0x1c USB
+ e000 0 0 1 &i8259 9 2
+ e000 0 0 2 &i8259 a 2
+ e000 0 0 3 &i8259 c 2
+ e000 0 0 4 &i8259 7 2
+
+ // IDSEL 0x1d Audio
+ e800 0 0 1 &i8259 9 2
+ e800 0 0 2 &i8259 a 2
+ e800 0 0 3 &i8259 b 2
+ e800 0 0 4 &i8259 0 0
+
+ // IDSEL 0x1e Legacy
+ f000 0 0 1 &i8259 c 2
+ f000 0 0 2 &i8259 0 0
+ f000 0 0 3 &i8259 0 0
+ f000 0 0 4 &i8259 0 0
+
+ // IDSEL 0x1f IDE/SATA
+ f800 0 0 1 &i8259 6 2
+ f800 0 0 2 &i8259 0 0
+ f800 0 0 3 &i8259 0 0
+ f800 0 0 4 &i8259 0 0
+ >;
+ uli1575@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ ranges = <02000000 0 b0000000
+ 02000000 0 b0000000
+ 0 10000000
+ 01000000 0 00000000
+ 01000000 0 00000000
+ 0 00080000>;
+
+ pci_bridge@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ ranges = <02000000 0 b0000000
+ 02000000 0 b0000000
+ 0 20000000
+ 01000000 0 00000000
+ 01000000 0 00000000
+ 0 00100000>;
+
+ isa@1e {
+ device_type = "isa";
+ #interrupt-cells = <2>;
+ #size-cells = <1>;
+ #address-cells = <2>;
+ reg = <f000 0 0 0 0>;
+ ranges = <1 0 01000000 0 0
+ 00001000>;
+ interrupt-parent = <&i8259>;
+
+ i8259: interrupt-controller@20 {
+ reg = <1 20 2
+ 1 a0 2
+ 1 4d0 2>;
+ clock-frequency = <0>;
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ built-in;
+ compatible = "chrp,iic";
+ interrupts = <9 2>;
+ interrupt-parent =
+ <&mpic>;
+ };
+
+ i8042@60 {
+ #size-cells = <0>;
+ #address-cells = <1>;
+ reg = <1 60 1 1 64 1>;
+ interrupts = <1 3 c 3>;
+ interrupt-parent =
+ <&i8259>;
+
+ keyboard@0 {
+ reg = <0>;
+ compatible = "pnpPNP,303";
+ };
+
+ mouse@1 {
+ reg = <1>;
+ compatible = "pnpPNP,f03";
+ };
+ };
+
+ rtc@70 {
+ compatible =
+ "pnpPNP,b00";
+ reg = <1 70 2>;
+ };
+
+ gpio@400 {
+ reg = <1 400 80>;
+ };
+ };
+ };
+ };
+
+ };
+
+ global-utilities@e0000 { //global utilities block
+ compatible = "fsl,mpc8548-guts";
+ reg = <e0000 1000>;
+ fsl,has-rstcr;
+ };
+
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 9d0b84b..d215d21 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -1,5 +1,5 @@
/*
- * MPC8555 CDS Device Tree Source
+ * MPC8548 CDS Device Tree Source
*
* Copyright 2006 Freescale Semiconductor Inc.
*
@@ -44,8 +44,14 @@
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00100000>; // CCSRBAR 1M
+ ranges = <00001000 e0001000 000ff000
+ 80000000 80000000 10000000
+ e2000000 e2000000 00800000
+ 90000000 90000000 10000000
+ e2800000 e2800000 00800000
+ a0000000 a0000000 20000000
+ e3000000 e3000000 01000000>;
+ reg = <e0000000 00001000>; // CCSRBAR
bus-frequency = <0>;
memory-controller@2000 {
@@ -162,8 +168,8 @@
serial@4500 {
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>; // reg base, size
- clock-frequency = <0>; // should we fill in in uboot?
+ reg = <4500 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
interrupts = <2a 2>;
interrupt-parent = <&mpic>;
};
@@ -172,7 +178,7 @@
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>; // reg base, size
- clock-frequency = <0>; // should we fill in in uboot?
+ clock-frequency = <0>; // should we fill in in uboot?
interrupts = <2a 2>;
interrupt-parent = <&mpic>;
};
@@ -183,77 +189,154 @@
fsl,has-rstcr;
};
- pci1: pci@8000 {
- interrupt-map-mask = <1f800 0 0 7>;
+ pci@8000 {
+ interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
+ /* IDSEL 0x4 (PCIX Slot 2) */
+ 02000 0 0 1 &mpic 0 1
+ 02000 0 0 2 &mpic 1 1
+ 02000 0 0 3 &mpic 2 1
+ 02000 0 0 4 &mpic 3 1
+
+ /* IDSEL 0x5 (PCIX Slot 3) */
+ 02800 0 0 1 &mpic 1 1
+ 02800 0 0 2 &mpic 2 1
+ 02800 0 0 3 &mpic 3 1
+ 02800 0 0 4 &mpic 0 1
+
+ /* IDSEL 0x6 (PCIX Slot 4) */
+ 03000 0 0 1 &mpic 2 1
+ 03000 0 0 2 &mpic 3 1
+ 03000 0 0 3 &mpic 0 1
+ 03000 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x8 (PCIX Slot 5) */
+ 04000 0 0 1 &mpic 0 1
+ 04000 0 0 2 &mpic 1 1
+ 04000 0 0 3 &mpic 2 1
+ 04000 0 0 4 &mpic 3 1
+
+ /* IDSEL 0xC (Tsi310 bridge) */
+ 06000 0 0 1 &mpic 0 1
+ 06000 0 0 2 &mpic 1 1
+ 06000 0 0 3 &mpic 2 1
+ 06000 0 0 4 &mpic 3 1
+
+ /* IDSEL 0x14 (Slot 2) */
+ 0a000 0 0 1 &mpic 0 1
+ 0a000 0 0 2 &mpic 1 1
+ 0a000 0 0 3 &mpic 2 1
+ 0a000 0 0 4 &mpic 3 1
+
+ /* IDSEL 0x15 (Slot 3) */
+ 0a800 0 0 1 &mpic 1 1
+ 0a800 0 0 2 &mpic 2 1
+ 0a800 0 0 3 &mpic 3 1
+ 0a800 0 0 4 &mpic 0 1
+
+ /* IDSEL 0x16 (Slot 4) */
+ 0b000 0 0 1 &mpic 2 1
+ 0b000 0 0 2 &mpic 3 1
+ 0b000 0 0 3 &mpic 0 1
+ 0b000 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x18 (Slot 5) */
+ 0c000 0 0 1 &mpic 0 1
+ 0c000 0 0 2 &mpic 1 1
+ 0c000 0 0 3 &mpic 2 1
+ 0c000 0 0 4 &mpic 3 1
+
+ /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
+ 0E000 0 0 1 &mpic 0 1
+ 0E000 0 0 2 &mpic 1 1
+ 0E000 0 0 3 &mpic 2 1
+ 0E000 0 0 4 &mpic 3 1>;
- /* IDSEL 0x10 */
- 08000 0 0 1 &mpic 0 1
- 08000 0 0 2 &mpic 1 1
- 08000 0 0 3 &mpic 2 1
- 08000 0 0 4 &mpic 3 1
-
- /* IDSEL 0x11 */
- 08800 0 0 1 &mpic 0 1
- 08800 0 0 2 &mpic 1 1
- 08800 0 0 3 &mpic 2 1
- 08800 0 0 4 &mpic 3 1
-
- /* IDSEL 0x12 (Slot 1) */
- 09000 0 0 1 &mpic 0 1
- 09000 0 0 2 &mpic 1 1
- 09000 0 0 3 &mpic 2 1
- 09000 0 0 4 &mpic 3 1
-
- /* IDSEL 0x13 (Slot 2) */
- 09800 0 0 1 &mpic 1 1
- 09800 0 0 2 &mpic 2 1
- 09800 0 0 3 &mpic 3 1
- 09800 0 0 4 &mpic 0 1
-
- /* IDSEL 0x14 (Slot 3) */
- 0a000 0 0 1 &mpic 2 1
- 0a000 0 0 2 &mpic 3 1
- 0a000 0 0 3 &mpic 0 1
- 0a000 0 0 4 &mpic 1 1
-
- /* IDSEL 0x15 (Slot 4) */
- 0a800 0 0 1 &mpic 3 1
- 0a800 0 0 2 &mpic 0 1
- 0a800 0 0 3 &mpic 1 1
- 0a800 0 0 4 &mpic 2 1
-
- /* Bus 1 (Tundra Bridge) */
- /* IDSEL 0x12 (ISA bridge) */
- 19000 0 0 1 &mpic 0 1
- 19000 0 0 2 &mpic 1 1
- 19000 0 0 3 &mpic 2 1
- 19000 0 0 4 &mpic 3 1>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
bus-range = <0 0>;
- ranges = <02000000 0 80000000 80000000 0 20000000
- 01000000 0 00000000 e2000000 0 00100000>;
+ ranges = <02000000 0 80000000 80000000 0 10000000
+ 01000000 0 00000000 e2000000 0 00800000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <8000 1000>;
- compatible = "85xx";
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
device_type = "pci";
- i8259@19000 {
- clock-frequency = <0>;
- interrupt-controller;
- device_type = "interrupt-controller";
- reg = <19000 0 0 0 1>;
- #address-cells = <0>;
- #interrupt-cells = <2>;
- built-in;
- compatible = "chrp,iic";
- big-endian;
- interrupts = <1>;
- interrupt-parent = <&pci1>;
+ pci_bridge@1c {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x00 (PrPMC Site) */
+ 0000 0 0 1 &mpic 0 1
+ 0000 0 0 2 &mpic 1 1
+ 0000 0 0 3 &mpic 2 1
+ 0000 0 0 4 &mpic 3 1
+
+ /* IDSEL 0x04 (VIA chip) */
+ 2000 0 0 1 &mpic 0 1
+ 2000 0 0 2 &mpic 1 1
+ 2000 0 0 3 &mpic 2 1
+ 2000 0 0 4 &mpic 3 1
+
+ /* IDSEL 0x05 (8139) */
+ 2800 0 0 1 &mpic 1 1
+
+ /* IDSEL 0x06 (Slot 6) */
+ 3000 0 0 1 &mpic 2 1
+ 3000 0 0 2 &mpic 3 1
+ 3000 0 0 3 &mpic 0 1
+ 3000 0 0 4 &mpic 1 1
+
+ /* IDESL 0x07 (Slot 7) */
+ 3800 0 0 1 &mpic 3 1
+ 3800 0 0 2 &mpic 0 1
+ 3800 0 0 3 &mpic 1 1
+ 3800 0 0 4 &mpic 2 1>;
+
+ reg = <e000 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ ranges = <02000000 0 80000000
+ 02000000 0 80000000
+ 0 20000000
+ 01000000 0 00000000
+ 01000000 0 00000000
+ 0 00080000>;
+ clock-frequency = <1fca055>;
+
+ isa@4 {
+ device_type = "isa";
+ #interrupt-cells = <2>;
+ #size-cells = <1>;
+ #address-cells = <2>;
+ reg = <2000 0 0 0 0>;
+ ranges = <1 0 01000000 0 0 00001000>;
+ interrupt-parent = <&i8259>;
+
+ i8259: interrupt-controller@20 {
+ clock-frequency = <0>;
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ reg = <1 20 2
+ 1 a0 2
+ 1 4d0 2>;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ built-in;
+ compatible = "chrp,iic";
+ interrupts = <0 1>;
+ interrupt-parent = <&mpic>;
+ };
+
+ rtc@70 {
+ compatible = "pnpPNP,b00";
+ reg = <1 70 2>;
+ };
+ };
};
};
@@ -263,20 +346,45 @@
/* IDSEL 0x15 */
a800 0 0 1 &mpic b 1
- a800 0 0 2 &mpic b 1
- a800 0 0 3 &mpic b 1
- a800 0 0 4 &mpic b 1>;
+ a800 0 0 2 &mpic 1 1
+ a800 0 0 3 &mpic 2 1
+ a800 0 0 4 &mpic 3 1>;
+
interrupt-parent = <&mpic>;
interrupts = <19 2>;
bus-range = <0 0>;
- ranges = <02000000 0 a0000000 a0000000 0 20000000
- 01000000 0 00000000 e3000000 0 00100000>;
+ ranges = <02000000 0 90000000 90000000 0 10000000
+ 01000000 0 00000000 e2800000 0 00800000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <9000 1000>;
- compatible = "85xx";
+ compatible = "fsl,mpc8540-pci";
+ device_type = "pci";
+ };
+ /* PCI Express */
+ pcie@a000 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x0 (PEX) */
+ 00000 0 0 1 &mpic 0 1
+ 00000 0 0 2 &mpic 1 1
+ 00000 0 0 3 &mpic 2 1
+ 00000 0 0 4 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <1a 2>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 a0000000 a0000000 0 20000000
+ 01000000 0 00000000 e3000000 0 08000000>;
+ clock-frequency = <1fca055>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <a000 1000>;
+ compatible = "fsl,mpc8548-pcie";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 17e45d9..c3c8882 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -193,7 +193,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <8000 1000>;
- compatible = "85xx";
+ compatible = "fsl,mpc8540-pci";
device_type = "pci";
i8259@19000 {
@@ -230,7 +230,7 @@
#size-cells = <2>;
#address-cells = <3>;
reg = <9000 1000>;
- compatible = "85xx";
+ compatible = "fsl,mpc8540-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 21ccaaa..16dbe84 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -136,7 +136,7 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- compatible = "85xx";
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
device_type = "pci";
reg = <8000 1000>;
clock-frequency = <3f940aa>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 6bb18f2..b1dcfbe 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -170,6 +170,66 @@
interrupt-parent = <&mpic>;
};
+ global-utilities@e0000 { //global utilities block
+ compatible = "fsl,mpc8548-guts";
+ reg = <e0000 1000>;
+ fsl,has-rstcr;
+ };
+
+ pci@8000 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x12 AD18 */
+ 9000 0 0 1 &mpic 5 1
+ 9000 0 0 2 &mpic 6 1
+ 9000 0 0 3 &mpic 7 1
+ 9000 0 0 4 &mpic 4 1
+
+ /* IDSEL 0x13 AD19 */
+ 9800 0 0 1 &mpic 6 1
+ 9800 0 0 2 &mpic 7 1
+ 9800 0 0 3 &mpic 4 1
+ 9800 0 0 4 &mpic 5 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e2000000 0 00800000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8000 1000>;
+ compatible = "fsl,mpc8540-pci";
+ device_type = "pci";
+ };
+
+ /* PCI Express */
+ pcie@a000 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x0 (PEX) */
+ 00000 0 0 1 &mpic 0 1
+ 00000 0 0 2 &mpic 1 1
+ 00000 0 0 3 &mpic 2 1
+ 00000 0 0 4 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <1a 2>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 a0000000 a0000000 0 20000000
+ 01000000 0 00000000 e3000000 0 08000000>;
+ clock-frequency = <1fca055>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <a000 1000>;
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ };
+
serial@4600 {
device_type = "serial";
compatible = "ns16550";
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 6a78a2b..5d82709 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -211,8 +211,8 @@
interrupt-parent = <&mpic>;
};
- pci@8000 {
- compatible = "86xx";
+ pcie@8000 {
+ compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
@@ -399,8 +399,8 @@
};
- pci@9000 {
- compatible = "86xx";
+ pcie@9000 {
+ compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#interrupt-cells = <1>;
#size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/prpmc2800.dts b/arch/powerpc/boot/dts/prpmc2800.dts
index 699d0df..5300b50 100644
--- a/arch/powerpc/boot/dts/prpmc2800.dts
+++ b/arch/powerpc/boot/dts/prpmc2800.dts
@@ -207,6 +207,12 @@
interrupt-parent = <&/mv64x60/pic>;
};
+ wdt@b410 { /* watchdog timer */
+ compatible = "marvell,mv64x60-wdt";
+ reg = <b410 8>;
+ timeout = <a>; /* wdt timeout in seconds */
+ };
+
i2c@c000 {
device_type = "i2c";
compatible = "marvell,mv64x60-i2c";
generated by cgit v0.10.2 at 2024-10-31 20:47:20 (GMT)