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-rw-r--r--arch/x86/mm/ioremap.c15
-rw-r--r--arch/x86/mm/pageattr.c7
2 files changed, 11 insertions, 11 deletions
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index d3026e1..24e42ca 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -42,13 +42,18 @@ int page_is_ram(unsigned long pagenr)
*/
if (e820.map[i].type != E820_RAM)
continue;
- /*
- * !!!FIXME!!! Some BIOSen report areas as RAM that
- * are not. Notably the 640->1Mb area. We need a sanity
- * check here.
- */
addr = (e820.map[i].addr + PAGE_SIZE-1) >> PAGE_SHIFT;
end = (e820.map[i].addr + e820.map[i].size) >> PAGE_SHIFT;
+
+ /*
+ * Sanity check: Some BIOSen report areas as RAM that
+ * are not. Notably the 640->1Mb area, which is the
+ * PCI BIOS area.
+ */
+ if (addr >= (BIOS_BEGIN >> PAGE_SHIFT) &&
+ end < (BIOS_END >> PAGE_SHIFT))
+ continue;
+
if ((pagenr >= addr) && (pagenr < end))
return 1;
}
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 19f7f7a..fcd9612 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -9,18 +9,13 @@
#include <linux/slab.h>
#include <linux/mm.h>
+#include <asm/e820.h>
#include <asm/processor.h>
#include <asm/tlbflush.h>
#include <asm/sections.h>
#include <asm/uaccess.h>
#include <asm/pgalloc.h>
-/*
- * We must allow the BIOS range to be executable:
- */
-#define BIOS_BEGIN 0x000a0000
-#define BIOS_END 0x00100000
-
static inline int
within(unsigned long addr, unsigned long start, unsigned long end)
{