diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/configs/85xx/e6500rev1_defconfig | 1 | ||||
| -rw-r--r-- | arch/powerpc/mm/tlb_nohash_low.S | 8 | ||||
| -rw-r--r-- | arch/powerpc/platforms/Kconfig.cputype | 10 |
3 files changed, 19 insertions, 0 deletions
diff --git a/arch/powerpc/configs/85xx/e6500rev1_defconfig b/arch/powerpc/configs/85xx/e6500rev1_defconfig index ca5ec62..ec07200 100644 --- a/arch/powerpc/configs/85xx/e6500rev1_defconfig +++ b/arch/powerpc/configs/85xx/e6500rev1_defconfig @@ -1,5 +1,6 @@ CONFIG_PPC64=y CONFIG_PPC_BOOK3E_64=y +CONFIG_FSL_ERRATUM_A_004801=y CONFIG_FSL_ERRATUM_A_005337=y CONFIG_FSL_ERRATUM_A_006198=y CONFIG_ALTIVEC=y diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S index 0fa3d4f..71b67ee 100644 --- a/arch/powerpc/mm/tlb_nohash_low.S +++ b/arch/powerpc/mm/tlb_nohash_low.S @@ -320,6 +320,7 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) blr #elif defined(CONFIG_PPC_BOOK3E) +#ifdef CONFIG_FSL_ERRATUM_A_004801 .macro tlb_lock ld r7,PACA_TLB_PER_CORE_PTR(r13) mtocrf 0x01,r7 @@ -348,6 +349,13 @@ ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) stb r9,0(r8) 1: .endm +#else +.macro tlb_lock +.endm + +.macro tlb_unlock +.endm +#endif /* * New Book3E (>= 2.06) implementation diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index 71636fc..4943a65 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype @@ -166,6 +166,16 @@ config PPC_E500MC such as e5500/e6500), and must be disabled for running on e500v1 or e500v2. +config FSL_ERRATUM_A_004801 + bool "Work around erratum A-004801" + depends on PPC_E500MC + default y + help + This works around erratum A-004801 by having invalidations + use the same lock as TLB writes. + + Say Y if if you need to be able to run on rev1 silicon. + config FSL_ERRATUM_A_005337 bool "Work around erratum A-005337 (no hw tablewalk)" depends on PPC_E500MC |