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-rw-r--r--drivers/atm/suni.c2
-rw-r--r--drivers/connector/connector.c7
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_main.c16
-rw-r--r--drivers/net/8139too.c2
-rw-r--r--drivers/net/bnx2.c477
-rw-r--r--drivers/net/bnx2.h37
-rw-r--r--drivers/net/cassini.c40
-rw-r--r--drivers/net/cassini.h2
-rw-r--r--drivers/net/e1000/e1000_main.c2
-rw-r--r--drivers/net/irda/Kconfig8
-rw-r--r--drivers/net/irda/Makefile1
-rw-r--r--drivers/net/irda/donauboe.c2
-rw-r--r--drivers/net/irda/ep7211_ir.c11
-rw-r--r--drivers/net/irda/irtty-sir.c19
-rw-r--r--drivers/net/irda/nsc-ircc.c320
-rw-r--r--drivers/net/irda/nsc-ircc.h2
-rw-r--r--drivers/net/irda/sir_dongle.c19
-rw-r--r--drivers/net/irda/toim3232-sir.c375
-rw-r--r--drivers/net/irda/vlsi_ir.c2
-rw-r--r--drivers/net/ppp_generic.c4
-rw-r--r--drivers/net/pppoe.c3
-rw-r--r--drivers/net/sungem.c37
-rw-r--r--drivers/net/sungem.h6
-rw-r--r--drivers/net/tg3.c648
-rw-r--r--drivers/net/tg3.h19
-rw-r--r--drivers/net/wan/sbni.c3
26 files changed, 1478 insertions, 586 deletions
diff --git a/drivers/atm/suni.c b/drivers/atm/suni.c
index 06817de..b1d063c 100644
--- a/drivers/atm/suni.c
+++ b/drivers/atm/suni.c
@@ -188,7 +188,7 @@ static int suni_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
case SONET_GETDIAG:
return get_diag(dev,arg);
case SONET_SETFRAMING:
- if (arg != SONET_FRAME_SONET) return -EINVAL;
+ if ((int)(unsigned long)arg != SONET_FRAME_SONET) return -EINVAL;
return 0;
case SONET_GETFRAMING:
return put_user(SONET_FRAME_SONET,(int __user *)arg) ?
diff --git a/drivers/connector/connector.c b/drivers/connector/connector.c
index 505677f..d7125f4 100644
--- a/drivers/connector/connector.c
+++ b/drivers/connector/connector.c
@@ -97,6 +97,9 @@ int cn_netlink_send(struct cn_msg *msg, u32 __group, gfp_t gfp_mask)
group = __group;
}
+ if (!netlink_has_listeners(dev->nls, group))
+ return -ESRCH;
+
size = NLMSG_SPACE(sizeof(*msg) + msg->len);
skb = alloc_skb(size, gfp_mask);
@@ -111,9 +114,7 @@ int cn_netlink_send(struct cn_msg *msg, u32 __group, gfp_t gfp_mask)
NETLINK_CB(skb).dst_group = group;
- netlink_broadcast(dev->nls, skb, 0, group, gfp_mask);
-
- return 0;
+ return netlink_broadcast(dev->nls, skb, 0, group, gfp_mask);
nlmsg_failure:
kfree_skb(skb);
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index 0ebacd5..37da8d3 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -253,7 +253,6 @@ static void path_free(struct net_device *dev, struct ipoib_path *path)
if (neigh->ah)
ipoib_put_ah(neigh->ah);
*to_ipoib_neigh(neigh->neighbour) = NULL;
- neigh->neighbour->ops->destructor = NULL;
kfree(neigh);
}
@@ -531,7 +530,6 @@ static void neigh_add_path(struct sk_buff *skb, struct net_device *dev)
err:
*to_ipoib_neigh(skb->dst->neighbour) = NULL;
list_del(&neigh->list);
- neigh->neighbour->ops->destructor = NULL;
kfree(neigh);
++priv->stats.tx_dropped;
@@ -770,21 +768,9 @@ static void ipoib_neigh_destructor(struct neighbour *n)
ipoib_put_ah(ah);
}
-static int ipoib_neigh_setup(struct neighbour *neigh)
-{
- /*
- * Is this kosher? I can't find anybody in the kernel that
- * sets neigh->destructor, so we should be able to set it here
- * without trouble.
- */
- neigh->ops->destructor = ipoib_neigh_destructor;
-
- return 0;
-}
-
static int ipoib_neigh_setup_dev(struct net_device *dev, struct neigh_parms *parms)
{
- parms->neigh_setup = ipoib_neigh_setup;
+ parms->neigh_destructor = ipoib_neigh_destructor;
return 0;
}
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c
index e58d4c50..f5ee064 100644
--- a/drivers/net/8139too.c
+++ b/drivers/net/8139too.c
@@ -1605,7 +1605,7 @@ static void rtl8139_thread (void *_data)
if (tp->watchdog_fired) {
tp->watchdog_fired = 0;
rtl8139_tx_timeout_task(_data);
- } else if (rtnl_shlock_nowait() == 0) {
+ } else if (rtnl_trylock()) {
rtl8139_thread_iter (dev, tp, tp->mmio_addr);
rtnl_unlock ();
} else {
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index b787b65..7d21370 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -14,8 +14,8 @@
#define DRV_MODULE_NAME "bnx2"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "1.4.31"
-#define DRV_MODULE_RELDATE "January 19, 2006"
+#define DRV_MODULE_VERSION "1.4.38"
+#define DRV_MODULE_RELDATE "February 10, 2006"
#define RUN_AT(x) (jiffies + (x))
@@ -360,6 +360,8 @@ bnx2_netif_start(struct bnx2 *bp)
static void
bnx2_free_mem(struct bnx2 *bp)
{
+ int i;
+
if (bp->stats_blk) {
pci_free_consistent(bp->pdev, sizeof(struct statistics_block),
bp->stats_blk, bp->stats_blk_mapping);
@@ -378,19 +380,23 @@ bnx2_free_mem(struct bnx2 *bp)
}
kfree(bp->tx_buf_ring);
bp->tx_buf_ring = NULL;
- if (bp->rx_desc_ring) {
- pci_free_consistent(bp->pdev,
- sizeof(struct rx_bd) * RX_DESC_CNT,
- bp->rx_desc_ring, bp->rx_desc_mapping);
- bp->rx_desc_ring = NULL;
- }
- kfree(bp->rx_buf_ring);
+ for (i = 0; i < bp->rx_max_ring; i++) {
+ if (bp->rx_desc_ring[i])
+ pci_free_consistent(bp->pdev,
+ sizeof(struct rx_bd) * RX_DESC_CNT,
+ bp->rx_desc_ring[i],
+ bp->rx_desc_mapping[i]);
+ bp->rx_desc_ring[i] = NULL;
+ }
+ vfree(bp->rx_buf_ring);
bp->rx_buf_ring = NULL;
}
static int
bnx2_alloc_mem(struct bnx2 *bp)
{
+ int i;
+
bp->tx_buf_ring = kmalloc(sizeof(struct sw_bd) * TX_DESC_CNT,
GFP_KERNEL);
if (bp->tx_buf_ring == NULL)
@@ -404,18 +410,23 @@ bnx2_alloc_mem(struct bnx2 *bp)
if (bp->tx_desc_ring == NULL)
goto alloc_mem_err;
- bp->rx_buf_ring = kmalloc(sizeof(struct sw_bd) * RX_DESC_CNT,
- GFP_KERNEL);
+ bp->rx_buf_ring = vmalloc(sizeof(struct sw_bd) * RX_DESC_CNT *
+ bp->rx_max_ring);
if (bp->rx_buf_ring == NULL)
goto alloc_mem_err;
- memset(bp->rx_buf_ring, 0, sizeof(struct sw_bd) * RX_DESC_CNT);
- bp->rx_desc_ring = pci_alloc_consistent(bp->pdev,
- sizeof(struct rx_bd) *
- RX_DESC_CNT,
- &bp->rx_desc_mapping);
- if (bp->rx_desc_ring == NULL)
- goto alloc_mem_err;
+ memset(bp->rx_buf_ring, 0, sizeof(struct sw_bd) * RX_DESC_CNT *
+ bp->rx_max_ring);
+
+ for (i = 0; i < bp->rx_max_ring; i++) {
+ bp->rx_desc_ring[i] =
+ pci_alloc_consistent(bp->pdev,
+ sizeof(struct rx_bd) * RX_DESC_CNT,
+ &bp->rx_desc_mapping[i]);
+ if (bp->rx_desc_ring[i] == NULL)
+ goto alloc_mem_err;
+
+ }
bp->status_blk = pci_alloc_consistent(bp->pdev,
sizeof(struct status_block),
@@ -1520,7 +1531,7 @@ bnx2_alloc_rx_skb(struct bnx2 *bp, u16 index)
struct sk_buff *skb;
struct sw_bd *rx_buf = &bp->rx_buf_ring[index];
dma_addr_t mapping;
- struct rx_bd *rxbd = &bp->rx_desc_ring[index];
+ struct rx_bd *rxbd = &bp->rx_desc_ring[RX_RING(index)][RX_IDX(index)];
unsigned long align;
skb = dev_alloc_skb(bp->rx_buf_size);
@@ -1656,23 +1667,30 @@ static inline void
bnx2_reuse_rx_skb(struct bnx2 *bp, struct sk_buff *skb,
u16 cons, u16 prod)
{
- struct sw_bd *cons_rx_buf = &bp->rx_buf_ring[cons];
- struct sw_bd *prod_rx_buf = &bp->rx_buf_ring[prod];
- struct rx_bd *cons_bd = &bp->rx_desc_ring[cons];
- struct rx_bd *prod_bd = &bp->rx_desc_ring[prod];
+ struct sw_bd *cons_rx_buf, *prod_rx_buf;
+ struct rx_bd *cons_bd, *prod_bd;
+
+ cons_rx_buf = &bp->rx_buf_ring[cons];
+ prod_rx_buf = &bp->rx_buf_ring[prod];
pci_dma_sync_single_for_device(bp->pdev,
pci_unmap_addr(cons_rx_buf, mapping),
bp->rx_offset + RX_COPY_THRESH, PCI_DMA_FROMDEVICE);
- prod_rx_buf->skb = cons_rx_buf->skb;
- pci_unmap_addr_set(prod_rx_buf, mapping,
- pci_unmap_addr(cons_rx_buf, mapping));
+ bp->rx_prod_bseq += bp->rx_buf_use_size;
- memcpy(prod_bd, cons_bd, 8);
+ prod_rx_buf->skb = skb;
- bp->rx_prod_bseq += bp->rx_buf_use_size;
+ if (cons == prod)
+ return;
+ pci_unmap_addr_set(prod_rx_buf, mapping,
+ pci_unmap_addr(cons_rx_buf, mapping));
+
+ cons_bd = &bp->rx_desc_ring[RX_RING(cons)][RX_IDX(cons)];
+ prod_bd = &bp->rx_desc_ring[RX_RING(prod)][RX_IDX(prod)];
+ prod_bd->rx_bd_haddr_hi = cons_bd->rx_bd_haddr_hi;
+ prod_bd->rx_bd_haddr_lo = cons_bd->rx_bd_haddr_lo;
}
static int
@@ -1699,14 +1717,19 @@ bnx2_rx_int(struct bnx2 *bp, int budget)
u32 status;
struct sw_bd *rx_buf;
struct sk_buff *skb;
+ dma_addr_t dma_addr;
sw_ring_cons = RX_RING_IDX(sw_cons);
sw_ring_prod = RX_RING_IDX(sw_prod);
rx_buf = &bp->rx_buf_ring[sw_ring_cons];
skb = rx_buf->skb;
- pci_dma_sync_single_for_cpu(bp->pdev,
- pci_unmap_addr(rx_buf, mapping),
+
+ rx_buf->skb = NULL;
+
+ dma_addr = pci_unmap_addr(rx_buf, mapping);
+
+ pci_dma_sync_single_for_cpu(bp->pdev, dma_addr,
bp->rx_offset + RX_COPY_THRESH, PCI_DMA_FROMDEVICE);
rx_hdr = (struct l2_fhdr *) skb->data;
@@ -1747,8 +1770,7 @@ bnx2_rx_int(struct bnx2 *bp, int budget)
skb = new_skb;
}
else if (bnx2_alloc_rx_skb(bp, sw_ring_prod) == 0) {
- pci_unmap_single(bp->pdev,
- pci_unmap_addr(rx_buf, mapping),
+ pci_unmap_single(bp->pdev, dma_addr,
bp->rx_buf_use_size, PCI_DMA_FROMDEVICE);
skb_reserve(skb, bp->rx_offset);
@@ -1794,8 +1816,6 @@ reuse_rx:
rx_pkt++;
next_rx:
- rx_buf->skb = NULL;
-
sw_cons = NEXT_RX_BD(sw_cons);
sw_prod = NEXT_RX_BD(sw_prod);
@@ -3340,27 +3360,35 @@ bnx2_init_rx_ring(struct bnx2 *bp)
bp->hw_rx_cons = 0;
bp->rx_prod_bseq = 0;
- rxbd = &bp->rx_desc_ring[0];
- for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
- rxbd->rx_bd_len = bp->rx_buf_use_size;
- rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
- }
+ for (i = 0; i < bp->rx_max_ring; i++) {
+ int j;
- rxbd->rx_bd_haddr_hi = (u64) bp->rx_desc_mapping >> 32;
- rxbd->rx_bd_haddr_lo = (u64) bp->rx_desc_mapping & 0xffffffff;
+ rxbd = &bp->rx_desc_ring[i][0];
+ for (j = 0; j < MAX_RX_DESC_CNT; j++, rxbd++) {
+ rxbd->rx_bd_len = bp->rx_buf_use_size;
+ rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
+ }
+ if (i == (bp->rx_max_ring - 1))
+ j = 0;
+ else
+ j = i + 1;
+ rxbd->rx_bd_haddr_hi = (u64) bp->rx_desc_mapping[j] >> 32;
+ rxbd->rx_bd_haddr_lo = (u64) bp->rx_desc_mapping[j] &
+ 0xffffffff;
+ }
val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE;
val |= BNX2_L2CTX_CTX_TYPE_SIZE_L2;
val |= 0x02 << 8;
CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_CTX_TYPE, val);
- val = (u64) bp->rx_desc_mapping >> 32;
+ val = (u64) bp->rx_desc_mapping[0] >> 32;
CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_HI, val);
- val = (u64) bp->rx_desc_mapping & 0xffffffff;
+ val = (u64) bp->rx_desc_mapping[0] & 0xffffffff;
CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_LO, val);
- for ( ;ring_prod < bp->rx_ring_size; ) {
+ for (i = 0; i < bp->rx_ring_size; i++) {
if (bnx2_alloc_rx_skb(bp, ring_prod) < 0) {
break;
}
@@ -3375,6 +3403,29 @@ bnx2_init_rx_ring(struct bnx2 *bp)
}
static void
+bnx2_set_rx_ring_size(struct bnx2 *bp, u32 size)
+{
+ u32 num_rings, max;
+
+ bp->rx_ring_size = size;
+ num_rings = 1;
+ while (size > MAX_RX_DESC_CNT) {
+ size -= MAX_RX_DESC_CNT;
+ num_rings++;
+ }
+ /* round to next power of 2 */
+ max = MAX_RX_RINGS;
+ while ((max & num_rings) == 0)
+ max >>= 1;
+
+ if (num_rings != max)
+ max <<= 1;
+
+ bp->rx_max_ring = max;
+ bp->rx_max_ring_idx = (bp->rx_max_ring * RX_DESC_CNT) - 1;
+}
+
+static void
bnx2_free_tx_skbs(struct bnx2 *bp)
{
int i;
@@ -3419,7 +3470,7 @@ bnx2_free_rx_skbs(struct bnx2 *bp)
if (bp->rx_buf_ring == NULL)
return;
- for (i = 0; i < RX_DESC_CNT; i++) {
+ for (i = 0; i < bp->rx_max_ring_idx; i++) {
struct sw_bd *rx_buf = &bp->rx_buf_ring[i];
struct sk_buff *skb = rx_buf->skb;
@@ -3506,74 +3557,9 @@ bnx2_test_registers(struct bnx2 *bp)
{ 0x0c00, 0, 0x00000000, 0x00000001 },
{ 0x0c04, 0, 0x00000000, 0x03ff0001 },
{ 0x0c08, 0, 0x0f0ff073, 0x00000000 },
- { 0x0c0c, 0, 0x00ffffff, 0x00000000 },
- { 0x0c30, 0, 0x00000000, 0xffffffff },
- { 0x0c34, 0, 0x00000000, 0xffffffff },
- { 0x0c38, 0, 0x00000000, 0xffffffff },
- { 0x0c3c, 0, 0x00000000, 0xffffffff },
- { 0x0c40, 0, 0x00000000, 0xffffffff },
- { 0x0c44, 0, 0x00000000, 0xffffffff },
- { 0x0c48, 0, 0x00000000, 0x0007ffff },
- { 0x0c4c, 0, 0x00000000, 0xffffffff },
- { 0x0c50, 0, 0x00000000, 0xffffffff },
- { 0x0c54, 0, 0x00000000, 0xffffffff },
- { 0x0c58, 0, 0x00000000, 0xffffffff },
- { 0x0c5c, 0, 0x00000000, 0xffffffff },
- { 0x0c60, 0, 0x00000000, 0xffffffff },
- { 0x0c64, 0, 0x00000000, 0xffffffff },
- { 0x0c68, 0, 0x00000000, 0xffffffff },
- { 0x0c6c, 0, 0x00000000, 0xffffffff },
- { 0x0c70, 0, 0x00000000, 0xffffffff },
- { 0x0c74, 0, 0x00000000, 0xffffffff },
- { 0x0c78, 0, 0x00000000, 0xffffffff },
- { 0x0c7c, 0, 0x00000000, 0xffffffff },
- { 0x0c80, 0, 0x00000000, 0xffffffff },
- { 0x0c84, 0, 0x00000000, 0xffffffff },
- { 0x0c88, 0, 0x00000000, 0xffffffff },
- { 0x0c8c, 0, 0x00000000, 0xffffffff },
- { 0x0c90, 0, 0x00000000, 0xffffffff },
- { 0x0c94, 0, 0x00000000, 0xffffffff },
- { 0x0c98, 0, 0x00000000, 0xffffffff },
- { 0x0c9c, 0, 0x00000000, 0xffffffff },
- { 0x0ca0, 0, 0x00000000, 0xffffffff },
- { 0x0ca4, 0, 0x00000000, 0xffffffff },
- { 0x0ca8, 0, 0x00000000, 0x0007ffff },
- { 0x0cac, 0, 0x00000000, 0xffffffff },
- { 0x0cb0, 0, 0x00000000, 0xffffffff },
- { 0x0cb4, 0, 0x00000000, 0xffffffff },
- { 0x0cb8, 0, 0x00000000, 0xffffffff },
- { 0x0cbc, 0, 0x00000000, 0xffffffff },
- { 0x0cc0, 0, 0x00000000, 0xffffffff },
- { 0x0cc4, 0, 0x00000000, 0xffffffff },
- { 0x0cc8, 0, 0x00000000, 0xffffffff },
- { 0x0ccc, 0, 0x00000000, 0xffffffff },
- { 0x0cd0, 0, 0x00000000, 0xffffffff },
- { 0x0cd4, 0, 0x00000000, 0xffffffff },
- { 0x0cd8, 0, 0x00000000, 0xffffffff },
- { 0x0cdc, 0, 0x00000000, 0xffffffff },
- { 0x0ce0, 0, 0x00000000, 0xffffffff },
- { 0x0ce4, 0, 0x00000000, 0xffffffff },
- { 0x0ce8, 0, 0x00000000, 0xffffffff },
- { 0x0cec, 0, 0x00000000, 0xffffffff },
- { 0x0cf0, 0, 0x00000000, 0xffffffff },
- { 0x0cf4, 0, 0x00000000, 0xffffffff },
- { 0x0cf8, 0, 0x00000000, 0xffffffff },
- { 0x0cfc, 0, 0x00000000, 0xffffffff },
- { 0x0d00, 0, 0x00000000, 0xffffffff },
- { 0x0d04, 0, 0x00000000, 0xffffffff },
{ 0x1000, 0, 0x00000000, 0x00000001 },
{ 0x1004, 0, 0x00000000, 0x000f0001 },
- { 0x1044, 0, 0x00000000, 0xffc003ff },
- { 0x1080, 0, 0x00000000, 0x0001ffff },
- { 0x1084, 0, 0x00000000, 0xffffffff },
- { 0x1088, 0, 0x00000000, 0xffffffff },
- { 0x108c, 0, 0x00000000, 0xffffffff },
- { 0x1090, 0, 0x00000000, 0xffffffff },
- { 0x1094, 0, 0x00000000, 0xffffffff },
- { 0x1098, 0, 0x00000000, 0xffffffff },
- { 0x109c, 0, 0x00000000, 0xffffffff },
- { 0x10a0, 0, 0x00000000, 0xffffffff },
{ 0x1408, 0, 0x01c00800, 0x00000000 },
{ 0x149c, 0, 0x8000ffff, 0x00000000 },
@@ -3585,111 +3571,9 @@ bnx2_test_registers(struct bnx2 *bp)
{ 0x14c4, 0, 0x00003fff, 0x00000000 },
{ 0x14cc, 0, 0x00000000, 0x00000001 },
{ 0x14d0, 0, 0xffffffff, 0x00000000 },
- { 0x1500, 0, 0x00000000, 0xffffffff },
- { 0x1504, 0, 0x00000000, 0xffffffff },
- { 0x1508, 0, 0x00000000, 0xffffffff },
- { 0x150c, 0, 0x00000000, 0xffffffff },
- { 0x1510, 0, 0x00000000, 0xffffffff },
- { 0x1514, 0, 0x00000000, 0xffffffff },
- { 0x1518, 0, 0x00000000, 0xffffffff },
- { 0x151c, 0, 0x00000000, 0xffffffff },
- { 0x1520, 0, 0x00000000, 0xffffffff },
- { 0x1524, 0, 0x00000000, 0xffffffff },
- { 0x1528, 0, 0x00000000, 0xffffffff },
- { 0x152c, 0, 0x00000000, 0xffffffff },
- { 0x1530, 0, 0x00000000, 0xffffffff },
- { 0x1534, 0, 0x00000000, 0xffffffff },
- { 0x1538, 0, 0x00000000, 0xffffffff },
- { 0x153c, 0, 0x00000000, 0xffffffff },
- { 0x1540, 0, 0x00000000, 0xffffffff },
- { 0x1544, 0, 0x00000000, 0xffffffff },
- { 0x1548, 0, 0x00000000, 0xffffffff },
- { 0x154c, 0, 0x00000000, 0xffffffff },
- { 0x1550, 0, 0x00000000, 0xffffffff },
- { 0x1554, 0, 0x00000000, 0xffffffff },
- { 0x1558, 0, 0x00000000, 0xffffffff },
- { 0x1600, 0, 0x00000000, 0xffffffff },
- { 0x1604, 0, 0x00000000, 0xffffffff },
- { 0x1608, 0, 0x00000000, 0xffffffff },
- { 0x160c, 0, 0x00000000, 0xffffffff },
- { 0x1610, 0, 0x00000000, 0xffffffff },
- { 0x1614, 0, 0x00000000, 0xffffffff },
- { 0x1618, 0, 0x00000000, 0xffffffff },
- { 0x161c, 0, 0x00000000, 0xffffffff },
- { 0x1620, 0, 0x00000000, 0xffffffff },
- { 0x1624, 0, 0x00000000, 0xffffffff },
- { 0x1628, 0, 0x00000000, 0xffffffff },
- { 0x162c, 0, 0x00000000, 0xffffffff },
- { 0x1630, 0, 0x00000000, 0xffffffff },
- { 0x1634, 0, 0x00000000, 0xffffffff },
- { 0x1638, 0, 0x00000000, 0xffffffff },
- { 0x163c, 0, 0x00000000, 0xffffffff },
- { 0x1640, 0, 0x00000000, 0xffffffff },
- { 0x1644, 0, 0x00000000, 0xffffffff },
- { 0x1648, 0, 0x00000000, 0xffffffff },
- { 0x164c, 0, 0x00000000, 0xffffffff },
- { 0x1650, 0, 0x00000000, 0xffffffff },
- { 0x1654, 0, 0x00000000, 0xffffffff },
{ 0x1800, 0, 0x00000000, 0x00000001 },
{ 0x1804, 0, 0x00000000, 0x00000003 },
- { 0x1840, 0, 0x00000000, 0xffffffff },
- { 0x1844, 0, 0x00000000, 0xffffffff },
- { 0x1848, 0, 0x00000000, 0xffffffff },
- { 0x184c, 0, 0x00000000, 0xffffffff },
- { 0x1850, 0, 0x00000000, 0xffffffff },
- { 0x1900, 0, 0x7ffbffff, 0x00000000 },
- { 0x1904, 0, 0xffffffff, 0x00000000 },
- { 0x190c, 0, 0xffffffff, 0x00000000 },
- { 0x1914, 0, 0xffffffff, 0x00000000 },
- { 0x191c, 0, 0xffffffff, 0x00000000 },
- { 0x1924, 0, 0xffffffff, 0x00000000 },
- { 0x192c, 0, 0xffffffff, 0x00000000 },
- { 0x1934, 0, 0xffffffff, 0x00000000 },
- { 0x193c, 0, 0xffffffff, 0x00000000 },
- { 0x1944, 0, 0xffffffff, 0x00000000 },
- { 0x194c, 0, 0xffffffff, 0x00000000 },
- { 0x1954, 0, 0xffffffff, 0x00000000 },
- { 0x195c, 0, 0xffffffff, 0x00000000 },
- { 0x1964, 0, 0xffffffff, 0x00000000 },
- { 0x196c, 0, 0xffffffff, 0x00000000 },
- { 0x1974, 0, 0xffffffff, 0x00000000 },
- { 0x197c, 0, 0xffffffff, 0x00000000 },
- { 0x1980, 0, 0x0700ffff, 0x00000000 },
-
- { 0x1c00, 0, 0x00000000, 0x00000001 },
- { 0x1c04, 0, 0x00000000, 0x00000003 },
- { 0x1c08, 0, 0x0000000f, 0x00000000 },
- { 0x1c40, 0, 0x00000000, 0xffffffff },
- { 0x1c44, 0, 0x00000000, 0xffffffff },
- { 0x1c48, 0, 0x00000000, 0xffffffff },
- { 0x1c4c, 0, 0x00000000, 0xffffffff },
- { 0x1c50, 0, 0x00000000, 0xffffffff },
- { 0x1d00, 0, 0x7ffbffff, 0x00000000 },
- { 0x1d04, 0, 0xffffffff, 0x00000000 },
- { 0x1d0c, 0, 0xffffffff, 0x00000000 },
- { 0x1d14, 0, 0xffffffff, 0x00000000 },
- { 0x1d1c, 0, 0xffffffff, 0x00000000 },
- { 0x1d24, 0, 0xffffffff, 0x00000000 },
- { 0x1d2c, 0, 0xffffffff, 0x00000000 },
- { 0x1d34, 0, 0xffffffff, 0x00000000 },
- { 0x1d3c, 0, 0xffffffff, 0x00000000 },
- { 0x1d44, 0, 0xffffffff, 0x00000000 },
- { 0x1d4c, 0, 0xffffffff, 0x00000000 },
- { 0x1d54, 0, 0xffffffff, 0x00000000 },
- { 0x1d5c, 0, 0xffffffff, 0x00000000 },
- { 0x1d64, 0, 0xffffffff, 0x00000000 },
- { 0x1d6c, 0, 0xffffffff, 0x00000000 },
- { 0x1d74, 0, 0xffffffff, 0x00000000 },
- { 0x1d7c, 0, 0xffffffff, 0x00000000 },
- { 0x1d80, 0, 0x0700ffff, 0x00000000 },
-
- { 0x2004, 0, 0x00000000, 0x0337000f },
- { 0x2008, 0, 0xffffffff, 0x00000000 },
- { 0x200c, 0, 0xffffffff, 0x00000000 },
- { 0x2010, 0, 0xffffffff, 0x00000000 },
- { 0x2014, 0, 0x801fff80, 0x00000000 },
- { 0x2018, 0, 0x000003ff, 0x00000000 },
{ 0x2800, 0, 0x00000000, 0x00000001 },
{ 0x2804, 0, 0x00000000, 0x00003f01 },
@@ -3707,16 +3591,6 @@ bnx2_test_registers(struct bnx2 *bp)
{ 0x2c00, 0, 0x00000000, 0x00000011 },
{ 0x2c04, 0, 0x00000000, 0x00030007 },
- { 0x3000, 0, 0x00000000, 0x00000001 },
- { 0x3004, 0, 0x00000000, 0x007007ff },
- { 0x3008, 0, 0x00000003, 0x00000000 },
- { 0x300c, 0, 0xffffffff, 0x00000000 },
- { 0x3010, 0, 0xffffffff, 0x00000000 },
- { 0x3014, 0, 0xffffffff, 0x00000000 },
- { 0x3034, 0, 0xffffffff, 0x00000000 },
- { 0x3038, 0, 0xffffffff, 0x00000000 },
- { 0x3050, 0, 0x00000001, 0x00000000 },
-
{ 0x3c00, 0, 0x00000000, 0x00000001 },
{ 0x3c04, 0, 0x00000000, 0x00070000 },
{ 0x3c08, 0, 0x00007f71, 0x07f00000 },
@@ -3726,88 +3600,11 @@ bnx2_test_registers(struct bnx2 *bp)
{ 0x3c18, 0, 0x00000000, 0xffffffff },
{ 0x3c1c, 0, 0xfffff000, 0x00000000 },
{ 0x3c20, 0, 0xffffff00, 0x00000000 },
- { 0x3c24, 0, 0xffffffff, 0x00000000 },
- { 0x3c28, 0, 0xffffffff, 0x00000000 },
- { 0x3c2c, 0, 0xffffffff, 0x00000000 },
- { 0x3c30, 0, 0xffffffff, 0x00000000 },
- { 0x3c34, 0, 0xffffffff, 0x00000000 },
- { 0x3c38, 0, 0xffffffff, 0x00000000 },
- { 0x3c3c, 0, 0xffffffff, 0x00000000 },
- { 0x3c40, 0, 0xffffffff, 0x00000000 },
- { 0x3c44, 0, 0xffffffff, 0x00000000 },
- { 0x3c48, 0, 0xffffffff, 0x00000000 },
- { 0x3c4c, 0, 0xffffffff, 0x00000000 },
- { 0x3c50, 0, 0xffffffff, 0x00000000 },
- { 0x3c54, 0, 0xffffffff, 0x00000000 },
- { 0x3c58, 0, 0xffffffff, 0x00000000 },
- { 0x3c5c, 0, 0xffffffff, 0x00000000 },
- { 0x3c60, 0, 0xffffffff, 0x00000000 },
- { 0x3c64, 0, 0xffffffff, 0x00000000 },
- { 0x3c68, 0, 0xffffffff, 0x00000000 },
- { 0x3c6c, 0, 0xffffffff, 0x00000000 },
- { 0x3c70, 0, 0xffffffff, 0x00000000 },
- { 0x3c74, 0, 0x0000003f, 0x00000000 },
- { 0x3c78, 0, 0x00000000, 0x00000000 },
- { 0x3c7c, 0, 0x00000000, 0x00000000 },
- { 0x3c80, 0, 0x3fffffff, 0x00000000 },
- { 0x3c84, 0, 0x0000003f, 0x00000000 },
- { 0x3c88, 0, 0x00000000, 0xffffffff },
- { 0x3c8c, 0, 0x00000000, 0xffffffff },
-
- { 0x4000, 0, 0x00000000, 0x00000001 },
- { 0x4004, 0, 0x00000000, 0x00030000 },
- { 0x4008, 0, 0x00000ff0, 0x00000000 },
- { 0x400c, 0, 0xffffffff, 0x00000000 },
- { 0x4088, 0, 0x00000000, 0x00070303 },
-
- { 0x4400, 0, 0x00000000, 0x00000001 },
- { 0x4404, 0, 0x00000000, 0x00003f01 },
- { 0x4408, 0, 0x7fff00ff, 0x00000000 },
- { 0x440c, 0, 0xffffffff, 0x00000000 },
- { 0x4410, 0, 0xffff, 0x0000 },
- { 0x4414, 0, 0xffff, 0x0000 },
- { 0x4418, 0, 0xffff, 0x0000 },
- { 0x441c, 0, 0xffff, 0x0000 },
- { 0x4428, 0, 0xffffffff, 0x00000000 },
- { 0x442c, 0, 0xffffffff, 0x00000000 },
- { 0x4430, 0, 0xffffffff, 0x00000000 },
- { 0x4434, 0, 0xffffffff, 0x00000000 },
- { 0x4438, 0, 0xffffffff, 0x00000000 },
- { 0x443c, 0, 0xffffffff, 0x00000000 },
- { 0x4440, 0, 0xffffffff, 0x00000000 },
- { 0x4444, 0, 0xffffffff, 0x00000000 },
-
- { 0x4c00, 0, 0x00000000, 0x00000001 },
- { 0x4c04, 0, 0x00000000, 0x0000003f },
- { 0x4c08, 0, 0xffffffff, 0x00000000 },
- { 0x4c0c, 0, 0x0007fc00, 0x00000000 },
- { 0x4c10, 0, 0x80003fe0, 0x00000000 },
- { 0x4c14, 0, 0xffffffff, 0x00000000 },
- { 0x4c44, 0, 0x00000000, 0x9fff9fff },
- { 0x4c48, 0, 0x00000000, 0xb3009fff },
- { 0x4c4c, 0, 0x00000000, 0x77f33b30 },
- { 0x4c50, 0, 0x00000000, 0xffffffff },
{ 0x5004, 0, 0x00000000, 0x0000007f },
{ 0x5008, 0, 0x0f0007ff, 0x00000000 },
{ 0x500c, 0, 0xf800f800, 0x07ff07ff },
- { 0x5400, 0, 0x00000008, 0x00000001 },
- { 0x5404, 0, 0x00000000, 0x0000003f },
- { 0x5408, 0, 0x0000001f, 0x00000000 },
- { 0x540c, 0, 0xffffffff, 0x00000000 },
- { 0x5410, 0, 0xffffffff, 0x00000000 },
- { 0x5414, 0, 0x0000ffff, 0x00000000 },
- { 0x5418, 0, 0x0000ffff, 0x00000000 },
- { 0x541c, 0, 0x0000ffff, 0x00000000 },
- { 0x5420, 0, 0x0000ffff, 0x00000000 },
- { 0x5428, 0, 0x000000ff, 0x00000000 },
- { 0x542c, 0, 0xff00ffff, 0x00000000 },
- { 0x5430, 0, 0x001fff80, 0x00000000 },
- { 0x5438, 0, 0xffffffff, 0x00000000 },
- { 0x543c, 0, 0xffffffff, 0x00000000 },
- { 0x5440, 0, 0xf800f800, 0x07ff07ff },
-
{ 0x5c00, 0, 0x00000000, 0x00000001 },
{ 0x5c04, 0, 0x00000000, 0x0003000f },
{ 0x5c08, 0, 0x00000003, 0x00000000 },
@@ -4794,6 +4591,64 @@ bnx2_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
info->fw_version[5] = 0;
}
+#define BNX2_REGDUMP_LEN (32 * 1024)
+
+static int
+bnx2_get_regs_len(struct net_device *dev)
+{
+ return BNX2_REGDUMP_LEN;
+}
+
+static void
+bnx2_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *_p)
+{
+ u32 *p = _p, i, offset;
+ u8 *orig_p = _p;
+ struct bnx2 *bp = netdev_priv(dev);
+ u32 reg_boundaries[] = { 0x0000, 0x0098, 0x0400, 0x045c,
+ 0x0800, 0x0880, 0x0c00, 0x0c10,
+ 0x0c30, 0x0d08, 0x1000, 0x101c,
+ 0x1040, 0x1048, 0x1080, 0x10a4,
+ 0x1400, 0x1490, 0x1498, 0x14f0,
+ 0x1500, 0x155c, 0x1580, 0x15dc,
+ 0x1600, 0x1658, 0x1680, 0x16d8,
+ 0x1800, 0x1820, 0x1840, 0x1854,
+ 0x1880, 0x1894, 0x1900, 0x1984,
+ 0x1c00, 0x1c0c, 0x1c40, 0x1c54,
+ 0x1c80, 0x1c94, 0x1d00, 0x1d84,
+ 0x2000, 0x2030, 0x23c0, 0x2400,
+ 0x2800, 0x2820, 0x2830, 0x2850,
+ 0x2b40, 0x2c10, 0x2fc0, 0x3058,
+ 0x3c00, 0x3c94, 0x4000, 0x4010,
+ 0x4080, 0x4090, 0x43c0, 0x4458,
+ 0x4c00, 0x4c18, 0x4c40, 0x4c54,
+ 0x4fc0, 0x5010, 0x53c0, 0x5444,
+ 0x5c00, 0x5c18, 0x5c80, 0x5c90,
+ 0x5fc0, 0x6000, 0x6400, 0x6428,
+ 0x6800, 0x6848, 0x684c, 0x6860,
+ 0x6888, 0x6910, 0x8000 };
+
+ regs->version = 0;
+
+ memset(p, 0, BNX2_REGDUMP_LEN);
+
+ if (!netif_running(bp->dev))
+ return;
+
+ i = 0;
+ offset = reg_boundaries[0];
+ p += offset;
+ while (offset < BNX2_REGDUMP_LEN) {
+ *p++ = REG_RD(bp, offset);
+ offset += 4;
+ if (offset == reg_boundaries[i + 1]) {
+ offset = reg_boundaries[i + 2];
+ p = (u32 *) (orig_p + offset);
+ i += 2;
+ }
+ }
+}
+
static void
bnx2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
{
@@ -4979,7 +4834,7 @@ bnx2_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
{
struct bnx2 *bp = netdev_priv(dev);
- ering->rx_max_pending = MAX_RX_DESC_CNT;
+ ering->rx_max_pending = MAX_TOTAL_RX_DESC_CNT;
ering->rx_mini_max_pending = 0;
ering->rx_jumbo_max_pending = 0;
@@ -4996,17 +4851,28 @@ bnx2_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering)
{
struct bnx2 *bp = netdev_priv(dev);
- if ((ering->rx_pending > MAX_RX_DESC_CNT) ||
+ if ((ering->rx_pending > MAX_TOTAL_RX_DESC_CNT) ||
(ering->tx_pending > MAX_TX_DESC_CNT) ||
(ering->tx_pending <= MAX_SKB_FRAGS)) {
return -EINVAL;
}
- bp->rx_ring_size = ering->rx_pending;
+ if (netif_running(bp->dev)) {
+ bnx2_netif_stop(bp);
+ bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_RESET);
+ bnx2_free_skbs(bp);
+ bnx2_free_mem(bp);
+ }
+
+ bnx2_set_rx_ring_size(bp, ering->rx_pending);
bp->tx_ring_size = ering->tx_pending;
if (netif_running(bp->dev)) {
- bnx2_netif_stop(bp);
+ int rc;
+
+ rc = bnx2_alloc_mem(bp);
+ if (rc)
+ return rc;
bnx2_init_nic(bp);
bnx2_netif_start(bp);
}
@@ -5360,6 +5226,8 @@ static struct ethtool_ops bnx2_ethtool_ops = {
.get_settings = bnx2_get_settings,
.set_settings = bnx2_set_settings,
.get_drvinfo = bnx2_get_drvinfo,
+ .get_regs_len = bnx2_get_regs_len,
+ .get_regs = bnx2_get_regs,
.get_wol = bnx2_get_wol,
.set_wol = bnx2_set_wol,
.nway_reset = bnx2_nway_reset,
@@ -5678,7 +5546,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
bp->mac_addr[5] = (u8) reg;
bp->tx_ring_size = MAX_TX_DESC_CNT;
- bp->rx_ring_size = 100;
+ bnx2_set_rx_ring_size(bp, 100);
bp->rx_csum = 1;
@@ -5897,6 +5765,7 @@ bnx2_suspend(struct pci_dev *pdev, pm_message_t state)
if (!netif_running(dev))
return 0;
+ flush_scheduled_work();
bnx2_netif_stop(bp);
netif_device_detach(dev);
del_timer_sync(&bp->timer);
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 9f691cb..fd4b7f2 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -23,6 +23,7 @@
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/slab.h>
+#include <linux/vmalloc.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/init.h>
@@ -3792,8 +3793,10 @@ struct l2_fhdr {
#define TX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct tx_bd))
#define MAX_TX_DESC_CNT (TX_DESC_CNT - 1)
+#define MAX_RX_RINGS 4
#define RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct rx_bd))
#define MAX_RX_DESC_CNT (RX_DESC_CNT - 1)
+#define MAX_TOTAL_RX_DESC_CNT (MAX_RX_DESC_CNT * MAX_RX_RINGS)
#define NEXT_TX_BD(x) (((x) & (MAX_TX_DESC_CNT - 1)) == \
(MAX_TX_DESC_CNT - 1)) ? \
@@ -3805,8 +3808,10 @@ struct l2_fhdr {
(MAX_RX_DESC_CNT - 1)) ? \
(x) + 2 : (x) + 1
-#define RX_RING_IDX(x) ((x) & MAX_RX_DESC_CNT)
+#define RX_RING_IDX(x) ((x) & bp->rx_max_ring_idx)
+#define RX_RING(x) (((x) & ~MAX_RX_DESC_CNT) >> 8)
+#define RX_IDX(x) ((x) & MAX_RX_DESC_CNT)
/* Context size. */
#define CTX_SHIFT 7
@@ -3903,6 +3908,15 @@ struct bnx2 {
struct status_block *status_blk;
u32 last_status_idx;
+ u32 flags;
+#define PCIX_FLAG 1
+#define PCI_32BIT_FLAG 2
+#define ONE_TDMA_FLAG 4 /* no longer used */
+#define NO_WOL_FLAG 8
+#define USING_DAC_FLAG 0x10
+#define USING_MSI_FLAG 0x20
+#define ASF_ENABLE_FLAG 0x40
+
struct tx_bd *tx_desc_ring;
struct sw_bd *tx_buf_ring;
u32 tx_prod_bseq;
@@ -3920,19 +3934,22 @@ struct bnx2 {
u32 rx_offset;
u32 rx_buf_use_size; /* useable size */
u32 rx_buf_size; /* with alignment */
- struct rx_bd *rx_desc_ring;
- struct sw_bd *rx_buf_ring;
+ u32 rx_max_ring_idx;
+
u32 rx_prod_bseq;
u16 rx_prod;
u16 rx_cons;
u32 rx_csum;
+ struct sw_bd *rx_buf_ring;
+ struct rx_bd *rx_desc_ring[MAX_RX_RINGS];
+
/* Only used to synchronize netif_stop_queue/wake_queue when tx */
/* ring is full */
spinlock_t tx_lock;
- /* End of fileds used in the performance code paths. */
+ /* End of fields used in the performance code paths. */
char *name;
@@ -3945,15 +3962,6 @@ struct bnx2 {
/* Used to synchronize phy accesses. */
spinlock_t phy_lock;
- u32 flags;
-#define PCIX_FLAG 1
-#define PCI_32BIT_FLAG 2
-#define ONE_TDMA_FLAG 4 /* no longer used */
-#define NO_WOL_FLAG 8
-#define USING_DAC_FLAG 0x10
-#define USING_MSI_FLAG 0x20
-#define ASF_ENABLE_FLAG 0x40
-
u32 phy_flags;
#define PHY_SERDES_FLAG 1
#define PHY_CRC_FIX_FLAG 2
@@ -4004,8 +4012,9 @@ struct bnx2 {
dma_addr_t tx_desc_mapping;
+ int rx_max_ring;
int rx_ring_size;
- dma_addr_t rx_desc_mapping;
+ dma_addr_t rx_desc_mapping[MAX_RX_RINGS];
u16 tx_quick_cons_trip;
u16 tx_quick_cons_trip_int;
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index 6e295fc..8f1573e 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -91,6 +91,7 @@
#include <linux/mii.h>
#include <linux/ip.h>
#include <linux/tcp.h>
+#include <linux/mutex.h>
#include <net/checksum.h>
@@ -3892,7 +3893,7 @@ static void cas_reset(struct cas *cp, int blkflag)
spin_unlock(&cp->stat_lock[N_TX_RINGS]);
}
-/* Shut down the chip, must be called with pm_sem held. */
+/* Shut down the chip, must be called with pm_mutex held. */
static void cas_shutdown(struct cas *cp)
{
unsigned long flags;
@@ -4311,11 +4312,11 @@ static int cas_open(struct net_device *dev)
int hw_was_up, err;
unsigned long flags;
- down(&cp->pm_sem);
+ mutex_lock(&cp->pm_mutex);
hw_was_up = cp->hw_running;
- /* The power-management semaphore protects the hw_running
+ /* The power-management mutex protects the hw_running
* etc. state so it is safe to do this bit without cp->lock
*/
if (!cp->hw_running) {
@@ -4364,7 +4365,7 @@ static int cas_open(struct net_device *dev)
cas_unlock_all_restore(cp, flags);
netif_start_queue(dev);
- up(&cp->pm_sem);
+ mutex_unlock(&cp->pm_mutex);
return 0;
err_spare:
@@ -4372,7 +4373,7 @@ err_spare:
cas_free_rxds(cp);
err_tx_tiny:
cas_tx_tiny_free(cp);
- up(&cp->pm_sem);
+ mutex_unlock(&cp->pm_mutex);
return err;
}
@@ -4382,7 +4383,7 @@ static int cas_close(struct net_device *dev)
struct cas *cp = netdev_priv(dev);
/* Make sure we don't get distracted by suspend/resume */
- down(&cp->pm_sem);
+ mutex_lock(&cp->pm_mutex);
netif_stop_queue(dev);
@@ -4399,7 +4400,7 @@ static int cas_close(struct net_device *dev)
cas_spare_free(cp);
cas_free_rxds(cp);
cas_tx_tiny_free(cp);
- up(&cp->pm_sem);
+ mutex_unlock(&cp->pm_mutex);
return 0;
}
@@ -4834,10 +4835,10 @@ static int cas_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
unsigned long flags;
int rc = -EOPNOTSUPP;
- /* Hold the PM semaphore while doing ioctl's or we may collide
+ /* Hold the PM mutex while doing ioctl's or we may collide
* with open/close and power management and oops.
*/
- down(&cp->pm_sem);
+ mutex_lock(&cp->pm_mutex);
switch (cmd) {
case SIOCGMIIPHY: /* Get address of MII PHY in use. */
data->phy_id = cp->phy_addr;
@@ -4867,7 +4868,7 @@ static int cas_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
break;
};
- up(&cp->pm_sem);
+ mutex_unlock(&cp->pm_mutex);
return rc;
}
@@ -4994,7 +4995,7 @@ static int __devinit cas_init_one(struct pci_dev *pdev,
spin_lock_init(&cp->tx_lock[i]);
}
spin_lock_init(&cp->stat_lock[N_TX_RINGS]);
- init_MUTEX(&cp->pm_sem);
+ mutex_init(&cp->pm_mutex);
init_timer(&cp->link_timer);
cp->link_timer.function = cas_link_timer;
@@ -5116,10 +5117,10 @@ err_out_free_consistent:
cp->init_block, cp->block_dvma);
err_out_iounmap:
- down(&cp->pm_sem);
+ mutex_lock(&cp->pm_mutex);
if (cp->hw_running)
cas_shutdown(cp);
- up(&cp->pm_sem);
+ mutex_unlock(&cp->pm_mutex);
iounmap(cp->regs);
@@ -5152,11 +5153,11 @@ static void __devexit cas_remove_one(struct pci_dev *pdev)
cp = netdev_priv(dev);
unregister_netdev(dev);
- down(&cp->pm_sem);
+ mutex_lock(&cp->pm_mutex);
flush_scheduled_work();
if (cp->hw_running)
cas_shutdown(cp);
- up(&cp->pm_sem);
+ mutex_unlock(&cp->pm_mutex);
#if 1
if (cp->orig_cacheline_size) {
@@ -5183,10 +5184,7 @@ static int cas_suspend(struct pci_dev *pdev, pm_message_t state)
struct cas *cp = netdev_priv(dev);
unsigned long flags;
- /* We hold the PM semaphore during entire driver
- * sleep time
- */
- down(&cp->pm_sem);
+ mutex_lock(&cp->pm_mutex);
/* If the driver is opened, we stop the DMA */
if (cp->opened) {
@@ -5206,6 +5204,7 @@ static int cas_suspend(struct pci_dev *pdev, pm_message_t state)
if (cp->hw_running)
cas_shutdown(cp);
+ mutex_unlock(&cp->pm_mutex);
return 0;
}
@@ -5217,6 +5216,7 @@ static int cas_resume(struct pci_dev *pdev)
printk(KERN_INFO "%s: resuming\n", dev->name);
+ mutex_lock(&cp->pm_mutex);
cas_hard_reset(cp);
if (cp->opened) {
unsigned long flags;
@@ -5229,7 +5229,7 @@ static int cas_resume(struct pci_dev *pdev)
netif_device_attach(dev);
}
- up(&cp->pm_sem);
+ mutex_unlock(&cp->pm_mutex);
return 0;
}
#endif /* CONFIG_PM */
diff --git a/drivers/net/cassini.h b/drivers/net/cassini.h
index 88063ef..ab55c7e 100644
--- a/drivers/net/cassini.h
+++ b/drivers/net/cassini.h
@@ -4284,7 +4284,7 @@ struct cas {
* (ie. not power managed) */
int hw_running;
int opened;
- struct semaphore pm_sem; /* open/close/suspend/resume */
+ struct mutex pm_mutex; /* open/close/suspend/resume */
struct cas_init_block *init_block;
struct cas_tx_desc *init_txds[MAX_TX_RINGS];
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index f39de16..49cd096 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -920,7 +920,7 @@ e1000_remove(struct pci_dev *pdev)
unregister_netdev(netdev);
#ifdef CONFIG_E1000_NAPI
for (i = 0; i < adapter->num_rx_queues; i++)
- __dev_put(&adapter->polling_netdev[i]);
+ dev_put(&adapter->polling_netdev[i]);
#endif
if (!e1000_check_phy_reset_block(&adapter->hw))
diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig
index c81fe1c..5e6d007 100644
--- a/drivers/net/irda/Kconfig
+++ b/drivers/net/irda/Kconfig
@@ -64,6 +64,14 @@ config TEKRAM_DONGLE
dongles you will have to start irattach like this:
"irattach -d tekram".
+config TOIM3232_DONGLE
+ tristate "TOIM3232 IrDa dongle"
+ depends on DONGLE && IRDA
+ help
+ Say Y here if you want to build support for the Vishay/Temic
+ TOIM3232 and TOIM4232 based dongles.
+ To compile it as a module, choose M here.
+
config LITELINK_DONGLE
tristate "Parallax LiteLink dongle"
depends on DONGLE && IRDA
diff --git a/drivers/net/irda/Makefile b/drivers/net/irda/Makefile
index 72cbfdc..27ab75f 100644
--- a/drivers/net/irda/Makefile
+++ b/drivers/net/irda/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_OLD_BELKIN_DONGLE) += old_belkin-sir.o
obj-$(CONFIG_MCP2120_DONGLE) += mcp2120-sir.o
obj-$(CONFIG_ACT200L_DONGLE) += act200l-sir.o
obj-$(CONFIG_MA600_DONGLE) += ma600-sir.o
+obj-$(CONFIG_TOIM3232_DONGLE) += toim3232-sir.o
# The SIR helper module
sir-dev-objs := sir_dev.o sir_dongle.o sir_kthread.o
diff --git a/drivers/net/irda/donauboe.c b/drivers/net/irda/donauboe.c
index 3137592..910c0ca 100644
--- a/drivers/net/irda/donauboe.c
+++ b/drivers/net/irda/donauboe.c
@@ -1778,7 +1778,7 @@ static struct pci_driver donauboe_pci_driver = {
static int __init
donauboe_init (void)
{
- return pci_module_init(&donauboe_pci_driver);
+ return pci_register_driver(&donauboe_pci_driver);
}
static void __exit
diff --git a/drivers/net/irda/ep7211_ir.c b/drivers/net/irda/ep7211_ir.c
index 3189626..4cba38f 100644
--- a/drivers/net/irda/ep7211_ir.c
+++ b/drivers/net/irda/ep7211_ir.c
@@ -8,6 +8,7 @@
#include <linux/delay.h>
#include <linux/tty.h>
#include <linux/init.h>
+#include <linux/spinlock.h>
#include <net/irda/irda.h>
#include <net/irda/irda_device.h>
@@ -23,6 +24,8 @@ static void ep7211_ir_close(dongle_t *self);
static int ep7211_ir_change_speed(struct irda_task *task);
static int ep7211_ir_reset(struct irda_task *task);
+static DEFINE_SPINLOCK(ep7211_lock);
+
static struct dongle_reg dongle = {
.type = IRDA_EP7211_IR,
.open = ep7211_ir_open,
@@ -36,7 +39,7 @@ static void ep7211_ir_open(dongle_t *self, struct qos_info *qos)
{
unsigned int syscon1, flags;
- save_flags(flags); cli();
+ spin_lock_irqsave(&ep7211_lock, flags);
/* Turn on the SIR encoder. */
syscon1 = clps_readl(SYSCON1);
@@ -46,14 +49,14 @@ static void ep7211_ir_open(dongle_t *self, struct qos_info *qos)
/* XXX: We should disable modem status interrupts on the first
UART (interrupt #14). */
- restore_flags(flags);
+ spin_unlock_irqrestore(&ep7211_lock, flags);
}
static void ep7211_ir_close(dongle_t *self)
{
unsigned int syscon1, flags;
- save_flags(flags); cli();
+ spin_lock_irqsave(&ep7211_lock, flags);
/* Turn off the SIR encoder. */
syscon1 = clps_readl(SYSCON1);
@@ -63,7 +66,7 @@ static void ep7211_ir_close(dongle_t *self)
/* XXX: If we've disabled the modem status interrupts, we should
reset them back to their original state. */
- restore_flags(flags);
+ spin_unlock_irqrestore(&ep7211_lock, flags);
}
/*
diff --git a/drivers/net/irda/irtty-sir.c b/drivers/net/irda/irtty-sir.c
index 101750b..6a98b7a 100644
--- a/drivers/net/irda/irtty-sir.c
+++ b/drivers/net/irda/irtty-sir.c
@@ -33,6 +33,7 @@
#include <asm/uaccess.h>
#include <linux/smp_lock.h>
#include <linux/delay.h>
+#include <linux/mutex.h>
#include <net/irda/irda.h>
#include <net/irda/irda_device.h>
@@ -338,7 +339,7 @@ static inline void irtty_stop_receiver(struct tty_struct *tty, int stop)
/*****************************************************************/
/* serialize ldisc open/close with sir_dev */
-static DECLARE_MUTEX(irtty_sem);
+static DEFINE_MUTEX(irtty_mutex);
/* notifier from sir_dev when irda% device gets opened (ifup) */
@@ -348,11 +349,11 @@ static int irtty_start_dev(struct sir_dev *dev)
struct tty_struct *tty;
/* serialize with ldisc open/close */
- down(&irtty_sem);
+ mutex_lock(&irtty_mutex);
priv = dev->priv;
if (unlikely(!priv || priv->magic!=IRTTY_MAGIC)) {
- up(&irtty_sem);
+ mutex_unlock(&irtty_mutex);
return -ESTALE;
}
@@ -363,7 +364,7 @@ static int irtty_start_dev(struct sir_dev *dev)
/* Make sure we can receive more data */
irtty_stop_receiver(tty, FALSE);
- up(&irtty_sem);
+ mutex_unlock(&irtty_mutex);
return 0;
}
@@ -375,11 +376,11 @@ static int irtty_stop_dev(struct sir_dev *dev)
struct tty_struct *tty;
/* serialize with ldisc open/close */
- down(&irtty_sem);
+ mutex_lock(&irtty_mutex);
priv = dev->priv;
if (unlikely(!priv || priv->magic!=IRTTY_MAGIC)) {
- up(&irtty_sem);
+ mutex_unlock(&irtty_mutex);
return -ESTALE;
}
@@ -390,7 +391,7 @@ static int irtty_stop_dev(struct sir_dev *dev)
if (tty->driver->stop)
tty->driver->stop(tty);
- up(&irtty_sem);
+ mutex_unlock(&irtty_mutex);
return 0;
}
@@ -514,13 +515,13 @@ static int irtty_open(struct tty_struct *tty)
priv->dev = dev;
/* serialize with start_dev - in case we were racing with ifup */
- down(&irtty_sem);
+ mutex_lock(&irtty_mutex);
dev->priv = priv;
tty->disc_data = priv;
tty->receive_room = 65536;
- up(&irtty_sem);
+ mutex_unlock(&irtty_mutex);
IRDA_DEBUG(0, "%s - %s: irda line discipline opened\n", __FUNCTION__, tty->name);
diff --git a/drivers/net/irda/nsc-ircc.c b/drivers/net/irda/nsc-ircc.c
index ee717d0..83141a3 100644
--- a/drivers/net/irda/nsc-ircc.c
+++ b/drivers/net/irda/nsc-ircc.c
@@ -12,6 +12,7 @@
* Copyright (c) 1998-2000 Dag Brattli <dagb@cs.uit.no>
* Copyright (c) 1998 Lichen Wang, <lwang@actisys.com>
* Copyright (c) 1998 Actisys Corp., www.actisys.com
+ * Copyright (c) 2000-2004 Jean Tourrilhes <jt@hpl.hp.com>
* All Rights Reserved
*
* This program is free software; you can redistribute it and/or
@@ -53,14 +54,13 @@
#include <linux/init.h>
#include <linux/rtnetlink.h>
#include <linux/dma-mapping.h>
+#include <linux/pnp.h>
+#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <asm/byteorder.h>
-#include <linux/pm.h>
-#include <linux/pm_legacy.h>
-
#include <net/irda/wrapper.h>
#include <net/irda/irda.h>
#include <net/irda/irda_device.h>
@@ -72,14 +72,27 @@
static char *driver_name = "nsc-ircc";
+/* Power Management */
+#define NSC_IRCC_DRIVER_NAME "nsc-ircc"
+static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state);
+static int nsc_ircc_resume(struct platform_device *dev);
+
+static struct platform_driver nsc_ircc_driver = {
+ .suspend = nsc_ircc_suspend,
+ .resume = nsc_ircc_resume,
+ .driver = {
+ .name = NSC_IRCC_DRIVER_NAME,
+ },
+};
+
/* Module parameters */
static int qos_mtt_bits = 0x07; /* 1 ms or more */
static int dongle_id;
/* Use BIOS settions by default, but user may supply module parameters */
-static unsigned int io[] = { ~0, ~0, ~0, ~0 };
-static unsigned int irq[] = { 0, 0, 0, 0, 0 };
-static unsigned int dma[] = { 0, 0, 0, 0, 0 };
+static unsigned int io[] = { ~0, ~0, ~0, ~0, ~0 };
+static unsigned int irq[] = { 0, 0, 0, 0, 0 };
+static unsigned int dma[] = { 0, 0, 0, 0, 0 };
static int nsc_ircc_probe_108(nsc_chip_t *chip, chipio_t *info);
static int nsc_ircc_probe_338(nsc_chip_t *chip, chipio_t *info);
@@ -87,6 +100,7 @@ static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info);
static int nsc_ircc_init_108(nsc_chip_t *chip, chipio_t *info);
static int nsc_ircc_init_338(nsc_chip_t *chip, chipio_t *info);
static int nsc_ircc_init_39x(nsc_chip_t *chip, chipio_t *info);
+static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id);
/* These are the known NSC chips */
static nsc_chip_t chips[] = {
@@ -101,11 +115,12 @@ static nsc_chip_t chips[] = {
/* Contributed by Jan Frey - IBM A30/A31 */
{ "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
nsc_ircc_probe_39x, nsc_ircc_init_39x },
+ { "IBM", { 0x2e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff,
+ nsc_ircc_probe_39x, nsc_ircc_init_39x },
{ NULL }
};
-/* Max 4 instances for now */
-static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
+static struct nsc_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL, NULL };
static char *dongle_types[] = {
"Differential serial interface",
@@ -126,8 +141,24 @@ static char *dongle_types[] = {
"No dongle connected",
};
+/* PNP probing */
+static chipio_t pnp_info;
+static const struct pnp_device_id nsc_ircc_pnp_table[] = {
+ { .id = "NSC6001", .driver_data = 0 },
+ { .id = "IBM0071", .driver_data = 0 },
+ { }
+};
+
+MODULE_DEVICE_TABLE(pnp, nsc_ircc_pnp_table);
+
+static struct pnp_driver nsc_ircc_pnp_driver = {
+ .name = "nsc-ircc",
+ .id_table = nsc_ircc_pnp_table,
+ .probe = nsc_ircc_pnp_probe,
+};
+
/* Some prototypes */
-static int nsc_ircc_open(int i, chipio_t *info);
+static int nsc_ircc_open(chipio_t *info);
static int nsc_ircc_close(struct nsc_ircc_cb *self);
static int nsc_ircc_setup(chipio_t *info);
static void nsc_ircc_pio_receive(struct nsc_ircc_cb *self);
@@ -146,7 +177,10 @@ static int nsc_ircc_net_open(struct net_device *dev);
static int nsc_ircc_net_close(struct net_device *dev);
static int nsc_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev);
-static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data);
+
+/* Globals */
+static int pnp_registered;
+static int pnp_succeeded;
/*
* Function nsc_ircc_init ()
@@ -158,28 +192,36 @@ static int __init nsc_ircc_init(void)
{
chipio_t info;
nsc_chip_t *chip;
- int ret = -ENODEV;
+ int ret;
int cfg_base;
int cfg, id;
int reg;
int i = 0;
+ ret = platform_driver_register(&nsc_ircc_driver);
+ if (ret) {
+ IRDA_ERROR("%s, Can't register driver!\n", driver_name);
+ return ret;
+ }
+
+ /* Register with PnP subsystem to detect disable ports */
+ ret = pnp_register_driver(&nsc_ircc_pnp_driver);
+
+ if (ret >= 0)
+ pnp_registered = 1;
+
+ ret = -ENODEV;
+
/* Probe for all the NSC chipsets we know about */
- for (chip=chips; chip->name ; chip++) {
+ for (chip = chips; chip->name ; chip++) {
IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __FUNCTION__,
chip->name);
/* Try all config registers for this chip */
- for (cfg=0; cfg<3; cfg++) {
+ for (cfg = 0; cfg < ARRAY_SIZE(chip->cfg); cfg++) {
cfg_base = chip->cfg[cfg];
if (!cfg_base)
continue;
-
- memset(&info, 0, sizeof(chipio_t));
- info.cfg_base = cfg_base;
- info.fir_base = io[i];
- info.dma = dma[i];
- info.irq = irq[i];
/* Read index register */
reg = inb(cfg_base);
@@ -194,24 +236,65 @@ static int __init nsc_ircc_init(void)
if ((id & chip->cid_mask) == chip->cid_value) {
IRDA_DEBUG(2, "%s() Found %s chip, revision=%d\n",
__FUNCTION__, chip->name, id & ~chip->cid_mask);
- /*
- * If the user supplies the base address, then
- * we init the chip, if not we probe the values
- * set by the BIOS
- */
- if (io[i] < 0x2000) {
- chip->init(chip, &info);
- } else
- chip->probe(chip, &info);
- if (nsc_ircc_open(i, &info) == 0)
- ret = 0;
+ /*
+ * If we found a correct PnP setting,
+ * we first try it.
+ */
+ if (pnp_succeeded) {
+ memset(&info, 0, sizeof(chipio_t));
+ info.cfg_base = cfg_base;
+ info.fir_base = pnp_info.fir_base;
+ info.dma = pnp_info.dma;
+ info.irq = pnp_info.irq;
+
+ if (info.fir_base < 0x2000) {
+ IRDA_MESSAGE("%s, chip->init\n", driver_name);
+ chip->init(chip, &info);
+ } else
+ chip->probe(chip, &info);
+
+ if (nsc_ircc_open(&info) >= 0)
+ ret = 0;
+ }
+
+ /*
+ * Opening based on PnP values failed.
+ * Let's fallback to user values, or probe
+ * the chip.
+ */
+ if (ret) {
+ IRDA_DEBUG(2, "%s, PnP init failed\n", driver_name);
+ memset(&info, 0, sizeof(chipio_t));
+ info.cfg_base = cfg_base;
+ info.fir_base = io[i];
+ info.dma = dma[i];
+ info.irq = irq[i];
+
+ /*
+ * If the user supplies the base address, then
+ * we init the chip, if not we probe the values
+ * set by the BIOS
+ */
+ if (io[i] < 0x2000) {
+ chip->init(chip, &info);
+ } else
+ chip->probe(chip, &info);
+
+ if (nsc_ircc_open(&info) >= 0)
+ ret = 0;
+ }
i++;
} else {
IRDA_DEBUG(2, "%s(), Wrong chip id=0x%02x\n", __FUNCTION__, id);
}
}
-
+ }
+
+ if (ret) {
+ platform_driver_unregister(&nsc_ircc_driver);
+ pnp_unregister_driver(&nsc_ircc_pnp_driver);
+ pnp_registered = 0;
}
return ret;
@@ -227,12 +310,17 @@ static void __exit nsc_ircc_cleanup(void)
{
int i;
- pm_unregister_all(nsc_ircc_pmproc);
-
- for (i=0; i < 4; i++) {
+ for (i = 0; i < ARRAY_SIZE(dev_self); i++) {
if (dev_self[i])
nsc_ircc_close(dev_self[i]);
}
+
+ platform_driver_unregister(&nsc_ircc_driver);
+
+ if (pnp_registered)
+ pnp_unregister_driver(&nsc_ircc_pnp_driver);
+
+ pnp_registered = 0;
}
/*
@@ -241,16 +329,26 @@ static void __exit nsc_ircc_cleanup(void)
* Open driver instance
*
*/
-static int __init nsc_ircc_open(int i, chipio_t *info)
+static int __init nsc_ircc_open(chipio_t *info)
{
struct net_device *dev;
struct nsc_ircc_cb *self;
- struct pm_dev *pmdev;
void *ret;
- int err;
+ int err, chip_index;
IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
+
+ for (chip_index = 0; chip_index < ARRAY_SIZE(dev_self); chip_index++) {
+ if (!dev_self[chip_index])
+ break;
+ }
+
+ if (chip_index == ARRAY_SIZE(dev_self)) {
+ IRDA_ERROR("%s(), maximum number of supported chips reached!\n", __FUNCTION__);
+ return -ENOMEM;
+ }
+
IRDA_MESSAGE("%s, Found chip at base=0x%03x\n", driver_name,
info->cfg_base);
@@ -271,8 +369,8 @@ static int __init nsc_ircc_open(int i, chipio_t *info)
spin_lock_init(&self->lock);
/* Need to store self somewhere */
- dev_self[i] = self;
- self->index = i;
+ dev_self[chip_index] = self;
+ self->index = chip_index;
/* Initialize IO */
self->io.cfg_base = info->cfg_base;
@@ -351,7 +449,7 @@ static int __init nsc_ircc_open(int i, chipio_t *info)
/* Check if user has supplied a valid dongle id or not */
if ((dongle_id <= 0) ||
- (dongle_id >= (sizeof(dongle_types) / sizeof(dongle_types[0]))) ) {
+ (dongle_id >= ARRAY_SIZE(dongle_types))) {
dongle_id = nsc_ircc_read_dongle_id(self->io.fir_base);
IRDA_MESSAGE("%s, Found dongle: %s\n", driver_name,
@@ -364,11 +462,18 @@ static int __init nsc_ircc_open(int i, chipio_t *info)
self->io.dongle_id = dongle_id;
nsc_ircc_init_dongle_interface(self->io.fir_base, dongle_id);
- pmdev = pm_register(PM_SYS_DEV, PM_SYS_IRDA, nsc_ircc_pmproc);
- if (pmdev)
- pmdev->data = self;
+ self->pldev = platform_device_register_simple(NSC_IRCC_DRIVER_NAME,
+ self->index, NULL, 0);
+ if (IS_ERR(self->pldev)) {
+ err = PTR_ERR(self->pldev);
+ goto out5;
+ }
+ platform_set_drvdata(self->pldev, self);
- return 0;
+ return chip_index;
+
+ out5:
+ unregister_netdev(dev);
out4:
dma_free_coherent(NULL, self->tx_buff.truesize,
self->tx_buff.head, self->tx_buff_dma);
@@ -379,7 +484,7 @@ static int __init nsc_ircc_open(int i, chipio_t *info)
release_region(self->io.fir_base, self->io.fir_ext);
out1:
free_netdev(dev);
- dev_self[i] = NULL;
+ dev_self[chip_index] = NULL;
return err;
}
@@ -399,6 +504,8 @@ static int __exit nsc_ircc_close(struct nsc_ircc_cb *self)
iobase = self->io.fir_base;
+ platform_device_unregister(self->pldev);
+
/* Remove netdevice */
unregister_netdev(self->netdev);
@@ -806,6 +913,43 @@ static int nsc_ircc_probe_39x(nsc_chip_t *chip, chipio_t *info)
return 0;
}
+/* PNP probing */
+static int nsc_ircc_pnp_probe(struct pnp_dev *dev, const struct pnp_device_id *id)
+{
+ memset(&pnp_info, 0, sizeof(chipio_t));
+ pnp_info.irq = -1;
+ pnp_info.dma = -1;
+ pnp_succeeded = 1;
+
+ /* There don't seem to be any way to get the cfg_base.
+ * On my box, cfg_base is in the PnP descriptor of the
+ * motherboard. Oh well... Jean II */
+
+ if (pnp_port_valid(dev, 0) &&
+ !(pnp_port_flags(dev, 0) & IORESOURCE_DISABLED))
+ pnp_info.fir_base = pnp_port_start(dev, 0);
+
+ if (pnp_irq_valid(dev, 0) &&
+ !(pnp_irq_flags(dev, 0) & IORESOURCE_DISABLED))
+ pnp_info.irq = pnp_irq(dev, 0);
+
+ if (pnp_dma_valid(dev, 0) &&
+ !(pnp_dma_flags(dev, 0) & IORESOURCE_DISABLED))
+ pnp_info.dma = pnp_dma(dev, 0);
+
+ IRDA_DEBUG(0, "%s() : From PnP, found firbase 0x%03X ; irq %d ; dma %d.\n",
+ __FUNCTION__, pnp_info.fir_base, pnp_info.irq, pnp_info.dma);
+
+ if((pnp_info.fir_base == 0) ||
+ (pnp_info.irq == -1) || (pnp_info.dma == -1)) {
+ /* Returning an error will disable the device. Yuck ! */
+ //return -EINVAL;
+ pnp_succeeded = 0;
+ }
+
+ return 0;
+}
+
/*
* Function nsc_ircc_setup (info)
*
@@ -2161,45 +2305,83 @@ static struct net_device_stats *nsc_ircc_net_get_stats(struct net_device *dev)
return &self->stats;
}
-static void nsc_ircc_suspend(struct nsc_ircc_cb *self)
+static int nsc_ircc_suspend(struct platform_device *dev, pm_message_t state)
{
- IRDA_MESSAGE("%s, Suspending\n", driver_name);
+ struct nsc_ircc_cb *self = platform_get_drvdata(dev);
+ int bank;
+ unsigned long flags;
+ int iobase = self->io.fir_base;
if (self->io.suspended)
- return;
+ return 0;
- nsc_ircc_net_close(self->netdev);
+ IRDA_DEBUG(1, "%s, Suspending\n", driver_name);
+ rtnl_lock();
+ if (netif_running(self->netdev)) {
+ netif_device_detach(self->netdev);
+ spin_lock_irqsave(&self->lock, flags);
+ /* Save current bank */
+ bank = inb(iobase+BSR);
+
+ /* Disable interrupts */
+ switch_bank(iobase, BANK0);
+ outb(0, iobase+IER);
+
+ /* Restore bank register */
+ outb(bank, iobase+BSR);
+
+ spin_unlock_irqrestore(&self->lock, flags);
+ free_irq(self->io.irq, self->netdev);
+ disable_dma(self->io.dma);
+ }
self->io.suspended = 1;
+ rtnl_unlock();
+
+ return 0;
}
-static void nsc_ircc_wakeup(struct nsc_ircc_cb *self)
+static int nsc_ircc_resume(struct platform_device *dev)
{
+ struct nsc_ircc_cb *self = platform_get_drvdata(dev);
+ unsigned long flags;
+
if (!self->io.suspended)
- return;
+ return 0;
+ IRDA_DEBUG(1, "%s, Waking up\n", driver_name);
+
+ rtnl_lock();
nsc_ircc_setup(&self->io);
- nsc_ircc_net_open(self->netdev);
-
- IRDA_MESSAGE("%s, Waking up\n", driver_name);
+ nsc_ircc_init_dongle_interface(self->io.fir_base, self->io.dongle_id);
+ if (netif_running(self->netdev)) {
+ if (request_irq(self->io.irq, nsc_ircc_interrupt, 0,
+ self->netdev->name, self->netdev)) {
+ IRDA_WARNING("%s, unable to allocate irq=%d\n",
+ driver_name, self->io.irq);
+
+ /*
+ * Don't fail resume process, just kill this
+ * network interface
+ */
+ unregister_netdevice(self->netdev);
+ } else {
+ spin_lock_irqsave(&self->lock, flags);
+ nsc_ircc_change_speed(self, self->io.speed);
+ spin_unlock_irqrestore(&self->lock, flags);
+ netif_device_attach(self->netdev);
+ }
+
+ } else {
+ spin_lock_irqsave(&self->lock, flags);
+ nsc_ircc_change_speed(self, 9600);
+ spin_unlock_irqrestore(&self->lock, flags);
+ }
self->io.suspended = 0;
-}
+ rtnl_unlock();
-static int nsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data)
-{
- struct nsc_ircc_cb *self = (struct nsc_ircc_cb*) dev->data;
- if (self) {
- switch (rqst) {
- case PM_SUSPEND:
- nsc_ircc_suspend(self);
- break;
- case PM_RESUME:
- nsc_ircc_wakeup(self);
- break;
- }
- }
- return 0;
+ return 0;
}
MODULE_AUTHOR("Dag Brattli <dagb@cs.uit.no>");
diff --git a/drivers/net/irda/nsc-ircc.h b/drivers/net/irda/nsc-ircc.h
index 6edf7e5..dacf671 100644
--- a/drivers/net/irda/nsc-ircc.h
+++ b/drivers/net/irda/nsc-ircc.h
@@ -269,7 +269,7 @@ struct nsc_ircc_cb {
__u32 new_speed;
int index; /* Instance index */
- struct pm_dev *dev;
+ struct platform_device *pldev;
};
static inline void switch_bank(int iobase, int bank)
diff --git a/drivers/net/irda/sir_dongle.c b/drivers/net/irda/sir_dongle.c
index 8d22592..d7e32d9 100644
--- a/drivers/net/irda/sir_dongle.c
+++ b/drivers/net/irda/sir_dongle.c
@@ -16,6 +16,7 @@
#include <linux/init.h>
#include <linux/smp_lock.h>
#include <linux/kmod.h>
+#include <linux/mutex.h>
#include <net/irda/irda.h>
@@ -28,7 +29,7 @@
*/
static LIST_HEAD(dongle_list); /* list of registered dongle drivers */
-static DECLARE_MUTEX(dongle_list_lock); /* protects the list */
+static DEFINE_MUTEX(dongle_list_lock); /* protects the list */
int irda_register_dongle(struct dongle_driver *new)
{
@@ -38,25 +39,25 @@ int irda_register_dongle(struct dongle_driver *new)
IRDA_DEBUG(0, "%s : registering dongle \"%s\" (%d).\n",
__FUNCTION__, new->driver_name, new->type);
- down(&dongle_list_lock);
+ mutex_lock(&dongle_list_lock);
list_for_each(entry, &dongle_list) {
drv = list_entry(entry, struct dongle_driver, dongle_list);
if (new->type == drv->type) {
- up(&dongle_list_lock);
+ mutex_unlock(&dongle_list_lock);
return -EEXIST;
}
}
list_add(&new->dongle_list, &dongle_list);
- up(&dongle_list_lock);
+ mutex_unlock(&dongle_list_lock);
return 0;
}
EXPORT_SYMBOL(irda_register_dongle);
int irda_unregister_dongle(struct dongle_driver *drv)
{
- down(&dongle_list_lock);
+ mutex_lock(&dongle_list_lock);
list_del(&drv->dongle_list);
- up(&dongle_list_lock);
+ mutex_unlock(&dongle_list_lock);
return 0;
}
EXPORT_SYMBOL(irda_unregister_dongle);
@@ -75,7 +76,7 @@ int sirdev_get_dongle(struct sir_dev *dev, IRDA_DONGLE type)
return -EBUSY;
/* serialize access to the list of registered dongles */
- down(&dongle_list_lock);
+ mutex_lock(&dongle_list_lock);
list_for_each(entry, &dongle_list) {
drv = list_entry(entry, struct dongle_driver, dongle_list);
@@ -109,14 +110,14 @@ int sirdev_get_dongle(struct sir_dev *dev, IRDA_DONGLE type)
if (!drv->open || (err=drv->open(dev))!=0)
goto out_reject; /* failed to open driver */
- up(&dongle_list_lock);
+ mutex_unlock(&dongle_list_lock);
return 0;
out_reject:
dev->dongle_drv = NULL;
module_put(drv->owner);
out_unlock:
- up(&dongle_list_lock);
+ mutex_unlock(&dongle_list_lock);
return err;
}
diff --git a/drivers/net/irda/toim3232-sir.c b/drivers/net/irda/toim3232-sir.c
new file mode 100644
index 0000000..aa1a9b0
--- /dev/null
+++ b/drivers/net/irda/toim3232-sir.c
@@ -0,0 +1,375 @@
+/*********************************************************************
+ *
+ * Filename: toim3232-sir.c
+ * Version: 1.0
+ * Description: Implementation of dongles based on the Vishay/Temic
+ * TOIM3232 SIR Endec chipset. Currently only the
+ * IRWave IR320ST-2 is tested, although it should work
+ * with any TOIM3232 or TOIM4232 chipset based RS232
+ * dongle with minimal modification.
+ * Based heavily on the Tekram driver (tekram.c),
+ * with thanks to Dag Brattli and Martin Diehl.
+ * Status: Experimental.
+ * Author: David Basden <davidb-irda@rcpt.to>
+ * Created at: Thu Feb 09 23:47:32 2006
+ *
+ * Copyright (c) 2006 David Basden.
+ * Copyright (c) 1998-1999 Dag Brattli,
+ * Copyright (c) 2002 Martin Diehl,
+ * All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * Neither Dag Brattli nor University of Tromsø admit liability nor
+ * provide warranty for any of this software. This material is
+ * provided "AS-IS" and at no charge.
+ *
+ ********************************************************************/
+
+/*
+ * This driver has currently only been tested on the IRWave IR320ST-2
+ *
+ * PROTOCOL:
+ *
+ * The protocol for talking to the TOIM3232 is quite easy, and is
+ * designed to interface with RS232 with only level convertors. The
+ * BR/~D line on the chip is brought high to signal 'command mode',
+ * where a command byte is sent to select the baudrate of the RS232
+ * interface and the pulse length of the IRDA output. When BR/~D
+ * is brought low, the dongle then changes to the selected baudrate,
+ * and the RS232 interface is used for data until BR/~D is brought
+ * high again. The initial speed for the TOIMx323 after RESET is
+ * 9600 baud. The baudrate for command-mode is the last selected
+ * baud-rate, or 9600 after a RESET.
+ *
+ * The dongle I have (below) adds some extra hardware on the front end,
+ * but this is mostly directed towards pariasitic power from the RS232
+ * line rather than changing very much about how to communicate with
+ * the TOIM3232.
+ *
+ * The protocol to talk to the TOIM4232 chipset seems to be almost
+ * identical to the TOIM3232 (and the 4232 datasheet is more detailed)
+ * so this code will probably work on that as well, although I haven't
+ * tested it on that hardware.
+ *
+ * Target dongle variations that might be common:
+ *
+ * DTR and RTS function:
+ * The data sheet for the 4232 has a sample implementation that hooks the
+ * DTR and RTS lines to the RESET and BaudRate/~Data lines of the
+ * chip (through line-converters). Given both DTR and RTS would have to
+ * be held low in normal operation, and the TOIMx232 requires +5V to
+ * signal ground, most dongle designers would almost certainly choose
+ * an implementation that kept at least one of DTR or RTS high in
+ * normal operation to provide power to the dongle, but will likely
+ * vary between designs.
+ *
+ * User specified command bits:
+ * There are two user-controllable output lines from the TOIMx232 that
+ * can be set low or high by setting the appropriate bits in the
+ * high-nibble of the command byte (when setting speed and pulse length).
+ * These might be used to switch on and off added hardware or extra
+ * dongle features.
+ *
+ *
+ * Target hardware: IRWave IR320ST-2
+ *
+ * The IRWave IR320ST-2 is a simple dongle based on the Vishay/Temic
+ * TOIM3232 SIR Endec and the Vishay/Temic TFDS4500 SIR IRDA transciever.
+ * It uses a hex inverter and some discrete components to buffer and
+ * line convert the RS232 down to 5V.
+ *
+ * The dongle is powered through a voltage regulator, fed by a large
+ * capacitor. To switch the dongle on, DTR is brought high to charge
+ * the capacitor and drive the voltage regulator. DTR isn't associated
+ * with any control lines on the TOIM3232. Parisitic power is also taken
+ * from the RTS, TD and RD lines when brought high, but through resistors.
+ * When DTR is low, the circuit might lose power even with RTS high.
+ *
+ * RTS is inverted and attached to the BR/~D input pin. When RTS
+ * is high, BR/~D is low, and the TOIM3232 is in the normal 'data' mode.
+ * RTS is brought low, BR/~D is high, and the TOIM3232 is in 'command
+ * mode'.
+ *
+ * For some unknown reason, the RESET line isn't actually connected
+ * to anything. This means to reset the dongle to get it to a known
+ * state (9600 baud) you must drop DTR and RTS low, wait for the power
+ * capacitor to discharge, and then bring DTR (and RTS for data mode)
+ * high again, and wait for the capacitor to charge, the power supply
+ * to stabilise, and the oscillator clock to stabilise.
+ *
+ * Fortunately, if the current baudrate is known, the chipset can
+ * easily change speed by entering command mode without having to
+ * reset the dongle first.
+ *
+ * Major Components:
+ *
+ * - Vishay/Temic TOIM3232 SIR Endec to change RS232 pulse timings
+ * to IRDA pulse timings
+ * - 3.6864MHz crystal to drive TOIM3232 clock oscillator
+ * - DM74lS04M Inverting Hex line buffer for RS232 input buffering
+ * and level conversion
+ * - PJ2951AC 150mA voltage regulator
+ * - Vishay/Temic TFDS4500 SIR IRDA front-end transceiver
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+
+#include <net/irda/irda.h>
+
+#include "sir-dev.h"
+
+static int toim3232delay = 150; /* default is 150 ms */
+module_param(toim3232delay, int, 0);
+MODULE_PARM_DESC(toim3232delay, "toim3232 dongle write complete delay");
+
+#if 0
+static int toim3232flipdtr = 0; /* default is DTR high to reset */
+module_param(toim3232flipdtr, int, 0);
+MODULE_PARM_DESC(toim3232flipdtr, "toim3232 dongle invert DTR (Reset)");
+
+static int toim3232fliprts = 0; /* default is RTS high for baud change */
+module_param(toim3232fliptrs, int, 0);
+MODULE_PARM_DESC(toim3232fliprts, "toim3232 dongle invert RTS (BR/D)");
+#endif
+
+static int toim3232_open(struct sir_dev *);
+static int toim3232_close(struct sir_dev *);
+static int toim3232_change_speed(struct sir_dev *, unsigned);
+static int toim3232_reset(struct sir_dev *);
+
+#define TOIM3232_115200 0x00
+#define TOIM3232_57600 0x01
+#define TOIM3232_38400 0x02
+#define TOIM3232_19200 0x03
+#define TOIM3232_9600 0x06
+#define TOIM3232_2400 0x0A
+
+#define TOIM3232_PW 0x10 /* Pulse select bit */
+
+static struct dongle_driver toim3232 = {
+ .owner = THIS_MODULE,
+ .driver_name = "Vishay TOIM3232",
+ .type = IRDA_TOIM3232_DONGLE,
+ .open = toim3232_open,
+ .close = toim3232_close,
+ .reset = toim3232_reset,
+ .set_speed = toim3232_change_speed,
+};
+
+static int __init toim3232_sir_init(void)
+{
+ if (toim3232delay < 1 || toim3232delay > 500)
+ toim3232delay = 200;
+ IRDA_DEBUG(1, "%s - using %d ms delay\n",
+ toim3232.driver_name, toim3232delay);
+ return irda_register_dongle(&toim3232);
+}
+
+static void __exit toim3232_sir_cleanup(void)
+{
+ irda_unregister_dongle(&toim3232);
+}
+
+static int toim3232_open(struct sir_dev *dev)
+{
+ struct qos_info *qos = &dev->qos;
+
+ IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
+
+ /* Pull the lines high to start with.
+ *
+ * For the IR320ST-2, we need to charge the main supply capacitor to
+ * switch the device on. We keep DTR high throughout to do this.
+ * When RTS, TD and RD are high, they will also trickle-charge the
+ * cap. RTS is high for data transmission, and low for baud rate select.
+ * -- DGB
+ */
+ sirdev_set_dtr_rts(dev, TRUE, TRUE);
+
+ /* The TOI3232 supports many speeds between 1200bps and 115000bps.
+ * We really only care about those supported by the IRDA spec, but
+ * 38400 seems to be implemented in many places */
+ qos->baud_rate.bits &= IR_2400|IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
+
+ /* From the tekram driver. Not sure what a reasonable value is -- DGB */
+ qos->min_turn_time.bits = 0x01; /* Needs at least 10 ms */
+ irda_qos_bits_to_value(qos);
+
+ /* irda thread waits 50 msec for power settling */
+
+ return 0;
+}
+
+static int toim3232_close(struct sir_dev *dev)
+{
+ IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
+
+ /* Power off dongle */
+ sirdev_set_dtr_rts(dev, FALSE, FALSE);
+
+ return 0;
+}
+
+/*
+ * Function toim3232change_speed (dev, state, speed)
+ *
+ * Set the speed for the TOIM3232 based dongle. Warning, this
+ * function must be called with a process context!
+ *
+ * Algorithm
+ * 1. keep DTR high but clear RTS to bring into baud programming mode
+ * 2. wait at least 7us to enter programming mode
+ * 3. send control word to set baud rate and timing
+ * 4. wait at least 1us
+ * 5. bring RTS high to enter DATA mode (RS232 is passed through to transceiver)
+ * 6. should take effect immediately (although probably worth waiting)
+ */
+
+#define TOIM3232_STATE_WAIT_SPEED (SIRDEV_STATE_DONGLE_SPEED + 1)
+
+static int toim3232_change_speed(struct sir_dev *dev, unsigned speed)
+{
+ unsigned state = dev->fsm.substate;
+ unsigned delay = 0;
+ u8 byte;
+ static int ret = 0;
+
+ IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
+
+ switch(state) {
+ case SIRDEV_STATE_DONGLE_SPEED:
+
+ /* Figure out what we are going to send as a control byte */
+ switch (speed) {
+ case 2400:
+ byte = TOIM3232_PW|TOIM3232_2400;
+ break;
+ default:
+ speed = 9600;
+ ret = -EINVAL;
+ /* fall thru */
+ case 9600:
+ byte = TOIM3232_PW|TOIM3232_9600;
+ break;
+ case 19200:
+ byte = TOIM3232_PW|TOIM3232_19200;
+ break;
+ case 38400:
+ byte = TOIM3232_PW|TOIM3232_38400;
+ break;
+ case 57600:
+ byte = TOIM3232_PW|TOIM3232_57600;
+ break;
+ case 115200:
+ byte = TOIM3232_115200;
+ break;
+ }
+
+ /* Set DTR, Clear RTS: Go into baud programming mode */
+ sirdev_set_dtr_rts(dev, TRUE, FALSE);
+
+ /* Wait at least 7us */
+ udelay(14);
+
+ /* Write control byte */
+ sirdev_raw_write(dev, &byte, 1);
+
+ dev->speed = speed;
+
+ state = TOIM3232_STATE_WAIT_SPEED;
+ delay = toim3232delay;
+ break;
+
+ case TOIM3232_STATE_WAIT_SPEED:
+ /* Have transmitted control byte * Wait for 'at least 1us' */
+ udelay(14);
+
+ /* Set DTR, Set RTS: Go into normal data mode */
+ sirdev_set_dtr_rts(dev, TRUE, TRUE);
+
+ /* Wait (TODO: check this is needed) */
+ udelay(50);
+ break;
+
+ default:
+ printk(KERN_ERR "%s - undefined state %d\n", __FUNCTION__, state);
+ ret = -EINVAL;
+ break;
+ }
+
+ dev->fsm.substate = state;
+ return (delay > 0) ? delay : ret;
+}
+
+/*
+ * Function toim3232reset (driver)
+ *
+ * This function resets the toim3232 dongle. Warning, this function
+ * must be called with a process context!!
+ *
+ * What we should do is:
+ * 0. Pull RESET high
+ * 1. Wait for at least 7us
+ * 2. Pull RESET low
+ * 3. Wait for at least 7us
+ * 4. Pull BR/~D high
+ * 5. Wait for at least 7us
+ * 6. Send control byte to set baud rate
+ * 7. Wait at least 1us after stop bit
+ * 8. Pull BR/~D low
+ * 9. Should then be in data mode
+ *
+ * Because the IR320ST-2 doesn't have the RESET line connected for some reason,
+ * we'll have to do something else.
+ *
+ * The default speed after a RESET is 9600, so lets try just bringing it up in
+ * data mode after switching it off, waiting for the supply capacitor to
+ * discharge, and then switch it back on. This isn't actually pulling RESET
+ * high, but it seems to have the same effect.
+ *
+ * This behaviour will probably work on dongles that have the RESET line connected,
+ * but if not, add a flag for the IR320ST-2, and implment the above-listed proper
+ * behaviour.
+ *
+ * RTS is inverted and then fed to BR/~D, so to put it in programming mode, we
+ * need to have pull RTS low
+ */
+
+static int toim3232_reset(struct sir_dev *dev)
+{
+ IRDA_DEBUG(2, "%s()\n", __FUNCTION__);
+
+ /* Switch off both DTR and RTS to switch off dongle */
+ sirdev_set_dtr_rts(dev, FALSE, FALSE);
+
+ /* Should sleep a while. This might be evil doing it this way.*/
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(msecs_to_jiffies(50));
+
+ /* Set DTR, Set RTS (data mode) */
+ sirdev_set_dtr_rts(dev, TRUE, TRUE);
+
+ /* Wait at least 10 ms for power to stabilize again */
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(msecs_to_jiffies(10));
+
+ /* Speed should now be 9600 */
+ dev->speed = 9600;
+
+ return 0;
+}
+
+MODULE_AUTHOR("David Basden <davidb-linux@rcpt.to>");
+MODULE_DESCRIPTION("Vishay/Temic TOIM3232 based dongle driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("irda-dongle-12"); /* IRDA_TOIM3232_DONGLE */
+
+module_init(toim3232_sir_init);
+module_exit(toim3232_sir_cleanup);
diff --git a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c
index a9f49f0..97a49e0 100644
--- a/drivers/net/irda/vlsi_ir.c
+++ b/drivers/net/irda/vlsi_ir.c
@@ -1887,7 +1887,7 @@ static int __init vlsi_mod_init(void)
vlsi_proc_root->owner = THIS_MODULE;
}
- ret = pci_module_init(&vlsi_irda_driver);
+ ret = pci_register_driver(&vlsi_irda_driver);
if (ret && vlsi_proc_root)
remove_proc_entry(PROC_DIR, NULL);
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index 0245e40..f608c12 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -1691,8 +1691,8 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)
|| ppp->npmode[npi] != NPMODE_PASS) {
kfree_skb(skb);
} else {
- skb_pull(skb, 2); /* chop off protocol */
- skb_postpull_rcsum(skb, skb->data - 2, 2);
+ /* chop off protocol */
+ skb_pull_rcsum(skb, 2);
skb->dev = ppp->dev;
skb->protocol = htons(npindex_to_ethertype[npi]);
skb->mac.raw = skb->data;
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c
index 9369f81..475dc93 100644
--- a/drivers/net/pppoe.c
+++ b/drivers/net/pppoe.c
@@ -337,8 +337,7 @@ static int pppoe_rcv_core(struct sock *sk, struct sk_buff *skb)
if (sk->sk_state & PPPOX_BOUND) {
struct pppoe_hdr *ph = (struct pppoe_hdr *) skb->nh.raw;
int len = ntohs(ph->length);
- skb_pull(skb, sizeof(struct pppoe_hdr));
- skb_postpull_rcsum(skb, ph, sizeof(*ph));
+ skb_pull_rcsum(skb, sizeof(struct pppoe_hdr));
if (pskb_trim_rcsum(skb, len))
goto abort_kfree;
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 28ce47a..38cd30c 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -55,6 +55,7 @@
#include <linux/workqueue.h>
#include <linux/if_vlan.h>
#include <linux/bitops.h>
+#include <linux/mutex.h>
#include <asm/system.h>
#include <asm/io.h>
@@ -2284,7 +2285,7 @@ static void gem_reset_task(void *data)
{
struct gem *gp = (struct gem *) data;
- down(&gp->pm_sem);
+ mutex_lock(&gp->pm_mutex);
netif_poll_disable(gp->dev);
@@ -2311,7 +2312,7 @@ static void gem_reset_task(void *data)
netif_poll_enable(gp->dev);
- up(&gp->pm_sem);
+ mutex_unlock(&gp->pm_mutex);
}
@@ -2320,14 +2321,14 @@ static int gem_open(struct net_device *dev)
struct gem *gp = dev->priv;
int rc = 0;
- down(&gp->pm_sem);
+ mutex_lock(&gp->pm_mutex);
/* We need the cell enabled */
if (!gp->asleep)
rc = gem_do_start(dev);
gp->opened = (rc == 0);
- up(&gp->pm_sem);
+ mutex_unlock(&gp->pm_mutex);
return rc;
}
@@ -2340,13 +2341,13 @@ static int gem_close(struct net_device *dev)
* our caller (dev_close) already did it for us
*/
- down(&gp->pm_sem);
+ mutex_lock(&gp->pm_mutex);
gp->opened = 0;
if (!gp->asleep)
gem_do_stop(dev, 0);
- up(&gp->pm_sem);
+ mutex_unlock(&gp->pm_mutex);
return 0;
}
@@ -2358,7 +2359,7 @@ static int gem_suspend(struct pci_dev *pdev, pm_message_t state)
struct gem *gp = dev->priv;
unsigned long flags;
- down(&gp->pm_sem);
+ mutex_lock(&gp->pm_mutex);
netif_poll_disable(dev);
@@ -2391,11 +2392,11 @@ static int gem_suspend(struct pci_dev *pdev, pm_message_t state)
/* Stop the link timer */
del_timer_sync(&gp->link_timer);
- /* Now we release the semaphore to not block the reset task who
+ /* Now we release the mutex to not block the reset task who
* can take it too. We are marked asleep, so there will be no
* conflict here
*/
- up(&gp->pm_sem);
+ mutex_unlock(&gp->pm_mutex);
/* Wait for a pending reset task to complete */
while (gp->reset_task_pending)
@@ -2424,7 +2425,7 @@ static int gem_resume(struct pci_dev *pdev)
printk(KERN_INFO "%s: resuming\n", dev->name);
- down(&gp->pm_sem);
+ mutex_lock(&gp->pm_mutex);
/* Keep the cell enabled during the entire operation, no need to
* take a lock here tho since nothing else can happen while we are
@@ -2440,7 +2441,7 @@ static int gem_resume(struct pci_dev *pdev)
* still asleep, a new sleep cycle may bring it back
*/
gem_put_cell(gp);
- up(&gp->pm_sem);
+ mutex_unlock(&gp->pm_mutex);
return 0;
}
pci_set_master(gp->pdev);
@@ -2486,7 +2487,7 @@ static int gem_resume(struct pci_dev *pdev)
netif_poll_enable(dev);
- up(&gp->pm_sem);
+ mutex_unlock(&gp->pm_mutex);
return 0;
}
@@ -2591,7 +2592,7 @@ static int gem_change_mtu(struct net_device *dev, int new_mtu)
return 0;
}
- down(&gp->pm_sem);
+ mutex_lock(&gp->pm_mutex);
spin_lock_irq(&gp->lock);
spin_lock(&gp->tx_lock);
dev->mtu = new_mtu;
@@ -2602,7 +2603,7 @@ static int gem_change_mtu(struct net_device *dev, int new_mtu)
}
spin_unlock(&gp->tx_lock);
spin_unlock_irq(&gp->lock);
- up(&gp->pm_sem);
+ mutex_unlock(&gp->pm_mutex);
return 0;
}
@@ -2771,10 +2772,10 @@ static int gem_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
int rc = -EOPNOTSUPP;
unsigned long flags;
- /* Hold the PM semaphore while doing ioctl's or we may collide
+ /* Hold the PM mutex while doing ioctl's or we may collide
* with power management.
*/
- down(&gp->pm_sem);
+ mutex_lock(&gp->pm_mutex);
spin_lock_irqsave(&gp->lock, flags);
gem_get_cell(gp);
@@ -2812,7 +2813,7 @@ static int gem_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
gem_put_cell(gp);
spin_unlock_irqrestore(&gp->lock, flags);
- up(&gp->pm_sem);
+ mutex_unlock(&gp->pm_mutex);
return rc;
}
@@ -3033,7 +3034,7 @@ static int __devinit gem_init_one(struct pci_dev *pdev,
spin_lock_init(&gp->lock);
spin_lock_init(&gp->tx_lock);
- init_MUTEX(&gp->pm_sem);
+ mutex_init(&gp->pm_mutex);
init_timer(&gp->link_timer);
gp->link_timer.function = gem_link_timer;
diff --git a/drivers/net/sungem.h b/drivers/net/sungem.h
index 13006d7..8984721 100644
--- a/drivers/net/sungem.h
+++ b/drivers/net/sungem.h
@@ -980,15 +980,15 @@ struct gem {
int tx_new, tx_old;
unsigned int has_wol : 1; /* chip supports wake-on-lan */
- unsigned int asleep : 1; /* chip asleep, protected by pm_sem */
+ unsigned int asleep : 1; /* chip asleep, protected by pm_mutex */
unsigned int asleep_wol : 1; /* was asleep with WOL enabled */
- unsigned int opened : 1; /* driver opened, protected by pm_sem */
+ unsigned int opened : 1; /* driver opened, protected by pm_mutex */
unsigned int running : 1; /* chip running, protected by lock */
/* cell enable count, protected by lock */
int cell_enabled;
- struct semaphore pm_sem;
+ struct mutex pm_mutex;
u32 msg_enable;
u32 status;
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 6c6c549..e03d1ae 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -69,8 +69,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "3.49"
-#define DRV_MODULE_RELDATE "Feb 2, 2006"
+#define DRV_MODULE_VERSION "3.52"
+#define DRV_MODULE_RELDATE "Mar 06, 2006"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
@@ -221,10 +221,22 @@ static struct pci_device_id tg3_pci_tbl[] = {
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754M,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787M,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5714S,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5715S,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780,
PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
{ PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S,
@@ -534,6 +546,9 @@ static void tg3_enable_ints(struct tg3 *tp)
(tp->misc_host_ctrl & ~MISC_HOST_CTRL_MASK_PCI_INT));
tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
(tp->last_tag << 24));
+ if (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)
+ tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
+ (tp->last_tag << 24));
tg3_cond_int(tp);
}
@@ -1038,9 +1053,11 @@ static void tg3_frob_aux_power(struct tg3 *tp)
struct net_device *dev_peer;
dev_peer = pci_get_drvdata(tp->pdev_peer);
+ /* remove_one() may have been run on the peer. */
if (!dev_peer)
- BUG();
- tp_peer = netdev_priv(dev_peer);
+ tp_peer = tp;
+ else
+ tp_peer = netdev_priv(dev_peer);
}
if ((tp->tg3_flags & TG3_FLAG_WOL_ENABLE) != 0 ||
@@ -1131,7 +1148,7 @@ static int tg3_halt_cpu(struct tg3 *, u32);
static int tg3_nvram_lock(struct tg3 *);
static void tg3_nvram_unlock(struct tg3 *);
-static int tg3_set_power_state(struct tg3 *tp, int state)
+static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
{
u32 misc_host_ctrl;
u16 power_control, power_caps;
@@ -1150,7 +1167,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
power_control |= PCI_PM_CTRL_PME_STATUS;
power_control &= ~(PCI_PM_CTRL_STATE_MASK);
switch (state) {
- case 0:
+ case PCI_D0:
power_control |= 0;
pci_write_config_word(tp->pdev,
pm + PCI_PM_CTRL,
@@ -1163,15 +1180,15 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
return 0;
- case 1:
+ case PCI_D1:
power_control |= 1;
break;
- case 2:
+ case PCI_D2:
power_control |= 2;
break;
- case 3:
+ case PCI_D3hot:
power_control |= 3;
break;
@@ -2680,6 +2697,12 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
+ if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP)
+ bmsr |= BMSR_LSTATUS;
+ else
+ bmsr &= ~BMSR_LSTATUS;
+ }
err |= tg3_readphy(tp, MII_BMCR, &bmcr);
@@ -2748,6 +2771,13 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
bmcr = new_bmcr;
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
err |= tg3_readphy(tp, MII_BMSR, &bmsr);
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) ==
+ ASIC_REV_5714) {
+ if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP)
+ bmsr |= BMSR_LSTATUS;
+ else
+ bmsr &= ~BMSR_LSTATUS;
+ }
tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
}
}
@@ -3338,6 +3368,23 @@ static inline void tg3_full_unlock(struct tg3 *tp)
spin_unlock_bh(&tp->lock);
}
+/* One-shot MSI handler - Chip automatically disables interrupt
+ * after sending MSI so driver doesn't have to do it.
+ */
+static irqreturn_t tg3_msi_1shot(int irq, void *dev_id, struct pt_regs *regs)
+{
+ struct net_device *dev = dev_id;
+ struct tg3 *tp = netdev_priv(dev);
+
+ prefetch(tp->hw_status);
+ prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
+
+ if (likely(!tg3_irq_sync(tp)))
+ netif_rx_schedule(dev); /* schedule NAPI poll */
+
+ return IRQ_HANDLED;
+}
+
/* MSI ISR - No need to check for interrupt sharing and no need to
* flush status block and interrupt mailbox. PCI ordering rules
* guarantee that MSI will arrive after the status block.
@@ -3628,11 +3675,139 @@ static void tg3_set_txd(struct tg3 *tp, int entry,
txd->vlan_tag = vlan_tag << TXD_VLAN_TAG_SHIFT;
}
+/* hard_start_xmit for devices that don't have any bugs and
+ * support TG3_FLG2_HW_TSO_2 only.
+ */
static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct tg3 *tp = netdev_priv(dev);
dma_addr_t mapping;
u32 len, entry, base_flags, mss;
+
+ len = skb_headlen(skb);
+
+ /* No BH disabling for tx_lock here. We are running in BH disabled
+ * context and TX reclaim runs via tp->poll inside of a software
+ * interrupt. Furthermore, IRQ processing runs lockless so we have
+ * no IRQ context deadlocks to worry about either. Rejoice!
+ */
+ if (!spin_trylock(&tp->tx_lock))
+ return NETDEV_TX_LOCKED;
+
+ if (unlikely(TX_BUFFS_AVAIL(tp) <= (skb_shinfo(skb)->nr_frags + 1))) {
+ if (!netif_queue_stopped(dev)) {
+ netif_stop_queue(dev);
+
+ /* This is a hard error, log it. */
+ printk(KERN_ERR PFX "%s: BUG! Tx Ring full when "
+ "queue awake!\n", dev->name);
+ }
+ spin_unlock(&tp->tx_lock);
+ return NETDEV_TX_BUSY;
+ }
+
+ entry = tp->tx_prod;
+ base_flags = 0;
+#if TG3_TSO_SUPPORT != 0
+ mss = 0;
+ if (skb->len > (tp->dev->mtu + ETH_HLEN) &&
+ (mss = skb_shinfo(skb)->tso_size) != 0) {
+ int tcp_opt_len, ip_tcp_len;
+
+ if (skb_header_cloned(skb) &&
+ pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) {
+ dev_kfree_skb(skb);
+ goto out_unlock;
+ }
+
+ tcp_opt_len = ((skb->h.th->doff - 5) * 4);
+ ip_tcp_len = (skb->nh.iph->ihl * 4) + sizeof(struct tcphdr);
+
+ base_flags |= (TXD_FLAG_CPU_PRE_DMA |
+ TXD_FLAG_CPU_POST_DMA);
+
+ skb->nh.iph->check = 0;
+ skb->nh.iph->tot_len = htons(mss + ip_tcp_len + tcp_opt_len);
+
+ skb->h.th->check = 0;
+
+ mss |= (ip_tcp_len + tcp_opt_len) << 9;
+ }
+ else if (skb->ip_summed == CHECKSUM_HW)
+ base_flags |= TXD_FLAG_TCPUDP_CSUM;
+#else
+ mss = 0;
+ if (skb->ip_summed == CHECKSUM_HW)
+ base_flags |= TXD_FLAG_TCPUDP_CSUM;
+#endif
+#if TG3_VLAN_TAG_USED
+ if (tp->vlgrp != NULL && vlan_tx_tag_present(skb))
+ base_flags |= (TXD_FLAG_VLAN |
+ (vlan_tx_tag_get(skb) << 16));
+#endif
+
+ /* Queue skb data, a.k.a. the main skb fragment. */
+ mapping = pci_map_single(tp->pdev, skb->data, len, PCI_DMA_TODEVICE);
+
+ tp->tx_buffers[entry].skb = skb;
+ pci_unmap_addr_set(&tp->tx_buffers[entry], mapping, mapping);
+
+ tg3_set_txd(tp, entry, mapping, len, base_flags,
+ (skb_shinfo(skb)->nr_frags == 0) | (mss << 1));
+
+ entry = NEXT_TX(entry);
+
+ /* Now loop through additional data fragments, and queue them. */
+ if (skb_shinfo(skb)->nr_frags > 0) {
+ unsigned int i, last;
+
+ last = skb_shinfo(skb)->nr_frags - 1;
+ for (i = 0; i <= last; i++) {
+ skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+
+ len = frag->size;
+ mapping = pci_map_page(tp->pdev,
+ frag->page,
+ frag->page_offset,
+ len, PCI_DMA_TODEVICE);
+
+ tp->tx_buffers[entry].skb = NULL;
+ pci_unmap_addr_set(&tp->tx_buffers[entry], mapping, mapping);
+
+ tg3_set_txd(tp, entry, mapping, len,
+ base_flags, (i == last) | (mss << 1));
+
+ entry = NEXT_TX(entry);
+ }
+ }
+
+ /* Packets are ready, update Tx producer idx local and on card. */
+ tw32_tx_mbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry);
+
+ tp->tx_prod = entry;
+ if (TX_BUFFS_AVAIL(tp) <= (MAX_SKB_FRAGS + 1)) {
+ netif_stop_queue(dev);
+ if (TX_BUFFS_AVAIL(tp) > TG3_TX_WAKEUP_THRESH)
+ netif_wake_queue(tp->dev);
+ }
+
+out_unlock:
+ mmiowb();
+ spin_unlock(&tp->tx_lock);
+
+ dev->trans_start = jiffies;
+
+ return NETDEV_TX_OK;
+}
+
+/* hard_start_xmit for devices that have the 4G bug and/or 40-bit bug and
+ * support TG3_FLG2_HW_TSO_1 or firmware TSO only.
+ */
+static int tg3_start_xmit_dma_bug(struct sk_buff *skb, struct net_device *dev)
+{
+ struct tg3 *tp = netdev_priv(dev);
+ dma_addr_t mapping;
+ u32 len, entry, base_flags, mss;
int would_hit_hwbug;
len = skb_headlen(skb);
@@ -4369,6 +4544,10 @@ static int tg3_chip_reset(struct tg3 *tp)
tp->nvram_lock_cnt = 0;
}
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+ tw32(GRC_FASTBOOT_PC, 0);
+
/*
* We must avoid the readl() that normally takes place.
* It locks machines, causes machine checks, and other
@@ -5518,6 +5697,9 @@ static int tg3_set_mac_addr(struct net_device *dev, void *p)
memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
+ if (!netif_running(dev))
+ return 0;
+
spin_lock_bh(&tp->lock);
__tg3_set_mac_addr(tp);
spin_unlock_bh(&tp->lock);
@@ -5585,6 +5767,9 @@ static int tg3_reset_hw(struct tg3 *tp)
tg3_abort_hw(tp, 1);
}
+ if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
+ tg3_phy_reset(tp);
+
err = tg3_chip_reset(tp);
if (err)
return err;
@@ -5993,6 +6178,10 @@ static int tg3_reset_hw(struct tg3 *tp)
}
}
+ /* Enable host coalescing bug fix */
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+ val |= (1 << 29);
+
tw32_f(WDMAC_MODE, val);
udelay(40);
@@ -6097,6 +6286,17 @@ static int tg3_reset_hw(struct tg3 *tp)
tp->tg3_flags2 |= TG3_FLG2_HW_AUTONEG;
}
+ if ((tp->tg3_flags2 & TG3_FLG2_MII_SERDES) &&
+ (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714)) {
+ u32 tmp;
+
+ tmp = tr32(SERDES_RX_CTRL);
+ tw32(SERDES_RX_CTRL, tmp | SERDES_RX_SIG_DETECT);
+ tp->grc_local_ctrl &= ~GRC_LCLCTRL_USE_EXT_SIG_DETECT;
+ tp->grc_local_ctrl |= GRC_LCLCTRL_USE_SIG_DETECT;
+ tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
+ }
+
err = tg3_setup_phy(tp, 1);
if (err)
return err;
@@ -6175,7 +6375,7 @@ static int tg3_init_hw(struct tg3 *tp)
int err;
/* Force the chip into D0. */
- err = tg3_set_power_state(tp, 0);
+ err = tg3_set_power_state(tp, PCI_D0);
if (err)
goto out;
@@ -6331,6 +6531,26 @@ static void tg3_timer(unsigned long __opaque)
add_timer(&tp->timer);
}
+static int tg3_request_irq(struct tg3 *tp)
+{
+ irqreturn_t (*fn)(int, void *, struct pt_regs *);
+ unsigned long flags;
+ struct net_device *dev = tp->dev;
+
+ if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
+ fn = tg3_msi;
+ if (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)
+ fn = tg3_msi_1shot;
+ flags = SA_SAMPLE_RANDOM;
+ } else {
+ fn = tg3_interrupt;
+ if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
+ fn = tg3_interrupt_tagged;
+ flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
+ }
+ return (request_irq(tp->pdev->irq, fn, flags, dev->name, dev));
+}
+
static int tg3_test_interrupt(struct tg3 *tp)
{
struct net_device *dev = tp->dev;
@@ -6367,16 +6587,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
free_irq(tp->pdev->irq, dev);
- if (tp->tg3_flags2 & TG3_FLG2_USING_MSI)
- err = request_irq(tp->pdev->irq, tg3_msi,
- SA_SAMPLE_RANDOM, dev->name, dev);
- else {
- irqreturn_t (*fn)(int, void *, struct pt_regs *)=tg3_interrupt;
- if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
- fn = tg3_interrupt_tagged;
- err = request_irq(tp->pdev->irq, fn,
- SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
- }
+ err = tg3_request_irq(tp);
if (err)
return err;
@@ -6428,14 +6639,7 @@ static int tg3_test_msi(struct tg3 *tp)
tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
- {
- irqreturn_t (*fn)(int, void *, struct pt_regs *)=tg3_interrupt;
- if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
- fn = tg3_interrupt_tagged;
-
- err = request_irq(tp->pdev->irq, fn,
- SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
- }
+ err = tg3_request_irq(tp);
if (err)
return err;
@@ -6462,6 +6666,10 @@ static int tg3_open(struct net_device *dev)
tg3_full_lock(tp, 0);
+ err = tg3_set_power_state(tp, PCI_D0);
+ if (err)
+ return err;
+
tg3_disable_ints(tp);
tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE;
@@ -6476,7 +6684,9 @@ static int tg3_open(struct net_device *dev)
if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
(GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_AX) &&
- (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_BX)) {
+ (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_BX) &&
+ !((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) &&
+ (tp->pdev_peer == tp->pdev))) {
/* All MSI supporting chips should support tagged
* status. Assert that this is the case.
*/
@@ -6491,17 +6701,7 @@ static int tg3_open(struct net_device *dev)
tp->tg3_flags2 |= TG3_FLG2_USING_MSI;
}
}
- if (tp->tg3_flags2 & TG3_FLG2_USING_MSI)
- err = request_irq(tp->pdev->irq, tg3_msi,
- SA_SAMPLE_RANDOM, dev->name, dev);
- else {
- irqreturn_t (*fn)(int, void *, struct pt_regs *)=tg3_interrupt;
- if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)
- fn = tg3_interrupt_tagged;
-
- err = request_irq(tp->pdev->irq, fn,
- SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
- }
+ err = tg3_request_irq(tp);
if (err) {
if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
@@ -6566,6 +6766,14 @@ static int tg3_open(struct net_device *dev)
return err;
}
+
+ if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
+ if (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI) {
+ u32 val = tr32(0x7c04);
+
+ tw32(0x7c04, val | (1 << 29));
+ }
+ }
}
tg3_full_lock(tp, 0);
@@ -6839,7 +7047,6 @@ static int tg3_close(struct net_device *dev)
tp->tg3_flags &=
~(TG3_FLAG_INIT_COMPLETE |
TG3_FLAG_GOT_SERDES_FLOWCTL);
- netif_carrier_off(tp->dev);
tg3_full_unlock(tp);
@@ -6856,6 +7063,10 @@ static int tg3_close(struct net_device *dev)
tg3_free_consistent(tp);
+ tg3_set_power_state(tp, PCI_D3hot);
+
+ netif_carrier_off(tp->dev);
+
return 0;
}
@@ -7150,6 +7361,9 @@ static void tg3_set_rx_mode(struct net_device *dev)
{
struct tg3 *tp = netdev_priv(dev);
+ if (!netif_running(dev))
+ return;
+
tg3_full_lock(tp, 0);
__tg3_set_rx_mode(dev);
tg3_full_unlock(tp);
@@ -7174,6 +7388,9 @@ static void tg3_get_regs(struct net_device *dev,
memset(p, 0, TG3_REGDUMP_LEN);
+ if (tp->link_config.phy_is_low_power)
+ return;
+
tg3_full_lock(tp, 0);
#define __GET_REG32(reg) (*(p)++ = tr32(reg))
@@ -7240,6 +7457,7 @@ static int tg3_get_eeprom_len(struct net_device *dev)
}
static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val);
+static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val);
static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data)
{
@@ -7248,6 +7466,9 @@ static int tg3_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
u8 *pd;
u32 i, offset, len, val, b_offset, b_count;
+ if (tp->link_config.phy_is_low_power)
+ return -EAGAIN;
+
offset = eeprom->offset;
len = eeprom->len;
eeprom->len = 0;
@@ -7309,6 +7530,9 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
u32 offset, len, b_offset, odd_len, start, end;
u8 *buf;
+ if (tp->link_config.phy_is_low_power)
+ return -EAGAIN;
+
if (eeprom->magic != TG3_EEPROM_MAGIC)
return -EINVAL;
@@ -7442,6 +7666,7 @@ static void tg3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info
strcpy(info->driver, DRV_MODULE_NAME);
strcpy(info->version, DRV_MODULE_VERSION);
+ strcpy(info->fw_version, tp->fw_ver);
strcpy(info->bus_info, pci_name(tp->pdev));
}
@@ -7536,11 +7761,20 @@ static void tg3_get_ringparam(struct net_device *dev, struct ethtool_ringparam *
ering->rx_max_pending = TG3_RX_RING_SIZE - 1;
ering->rx_mini_max_pending = 0;
- ering->rx_jumbo_max_pending = TG3_RX_JUMBO_RING_SIZE - 1;
+ if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE)
+ ering->rx_jumbo_max_pending = TG3_RX_JUMBO_RING_SIZE - 1;
+ else
+ ering->rx_jumbo_max_pending = 0;
+
+ ering->tx_max_pending = TG3_TX_RING_SIZE - 1;
ering->rx_pending = tp->rx_pending;
ering->rx_mini_pending = 0;
- ering->rx_jumbo_pending = tp->rx_jumbo_pending;
+ if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE)
+ ering->rx_jumbo_pending = tp->rx_jumbo_pending;
+ else
+ ering->rx_jumbo_pending = 0;
+
ering->tx_pending = tp->tx_pending;
}
@@ -7661,10 +7895,10 @@ static int tg3_set_tx_csum(struct net_device *dev, u32 data)
return 0;
}
- if (data)
- dev->features |= NETIF_F_IP_CSUM;
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+ ethtool_op_set_tx_hw_csum(dev, data);
else
- dev->features &= ~NETIF_F_IP_CSUM;
+ ethtool_op_set_tx_csum(dev, data);
return 0;
}
@@ -7734,29 +7968,52 @@ static void tg3_get_ethtool_stats (struct net_device *dev,
}
#define NVRAM_TEST_SIZE 0x100
+#define NVRAM_SELFBOOT_FORMAT1_SIZE 0x14
static int tg3_test_nvram(struct tg3 *tp)
{
- u32 *buf, csum;
- int i, j, err = 0;
+ u32 *buf, csum, magic;
+ int i, j, err = 0, size;
- buf = kmalloc(NVRAM_TEST_SIZE, GFP_KERNEL);
+ if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
+ return -EIO;
+
+ if (magic == TG3_EEPROM_MAGIC)
+ size = NVRAM_TEST_SIZE;
+ else if ((magic & 0xff000000) == 0xa5000000) {
+ if ((magic & 0xe00000) == 0x200000)
+ size = NVRAM_SELFBOOT_FORMAT1_SIZE;
+ else
+ return 0;
+ } else
+ return -EIO;
+
+ buf = kmalloc(size, GFP_KERNEL);
if (buf == NULL)
return -ENOMEM;
- for (i = 0, j = 0; i < NVRAM_TEST_SIZE; i += 4, j++) {
+ err = -EIO;
+ for (i = 0, j = 0; i < size; i += 4, j++) {
u32 val;
if ((err = tg3_nvram_read(tp, i, &val)) != 0)
break;
buf[j] = cpu_to_le32(val);
}
- if (i < NVRAM_TEST_SIZE)
+ if (i < size)
goto out;
- err = -EIO;
- if (cpu_to_be32(buf[0]) != TG3_EEPROM_MAGIC)
- goto out;
+ /* Selfboot format */
+ if (cpu_to_be32(buf[0]) != TG3_EEPROM_MAGIC) {
+ u8 *buf8 = (u8 *) buf, csum8 = 0;
+
+ for (i = 0; i < size; i++)
+ csum8 += buf8[i];
+
+ if (csum8 == 0)
+ return 0;
+ return -EIO;
+ }
/* Bootstrap checksum at offset 0x10 */
csum = calc_crc((unsigned char *) buf, 0x10);
@@ -7802,7 +8059,7 @@ static int tg3_test_link(struct tg3 *tp)
}
/* Only test the commonly used registers */
-static const int tg3_test_registers(struct tg3 *tp)
+static int tg3_test_registers(struct tg3 *tp)
{
int i, is_5705;
u32 offset, read_mask, write_mask, val, save_val, read_val;
@@ -8050,14 +8307,24 @@ static int tg3_test_memory(struct tg3 *tp)
{ 0x00008000, 0x02000},
{ 0x00010000, 0x0e000},
{ 0xffffffff, 0x00000}
+ }, mem_tbl_5755[] = {
+ { 0x00000200, 0x00008},
+ { 0x00004000, 0x00800},
+ { 0x00006000, 0x00800},
+ { 0x00008000, 0x02000},
+ { 0x00010000, 0x0c000},
+ { 0xffffffff, 0x00000}
};
struct mem_entry *mem_tbl;
int err = 0;
int i;
- if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
- mem_tbl = mem_tbl_5705;
- else
+ if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+ mem_tbl = mem_tbl_5755;
+ else
+ mem_tbl = mem_tbl_5705;
+ } else
mem_tbl = mem_tbl_570x;
for (i = 0; mem_tbl[i].offset != 0xffffffff; i++) {
@@ -8229,6 +8496,9 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
{
struct tg3 *tp = netdev_priv(dev);
+ if (tp->link_config.phy_is_low_power)
+ tg3_set_power_state(tp, PCI_D0);
+
memset(data, 0, sizeof(u64) * TG3_NUM_TEST);
if (tg3_test_nvram(tp) != 0) {
@@ -8257,6 +8527,9 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
if (!err)
tg3_nvram_unlock(tp);
+ if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
+ tg3_phy_reset(tp);
+
if (tg3_test_registers(tp) != 0) {
etest->flags |= ETH_TEST_FL_FAILED;
data[2] = 1;
@@ -8286,6 +8559,9 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
tg3_full_unlock(tp);
}
+ if (tp->link_config.phy_is_low_power)
+ tg3_set_power_state(tp, PCI_D3hot);
+
}
static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
@@ -8305,6 +8581,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
break; /* We have no PHY */
+ if (tp->link_config.phy_is_low_power)
+ return -EAGAIN;
+
spin_lock_bh(&tp->lock);
err = tg3_readphy(tp, data->reg_num & 0x1f, &mii_regval);
spin_unlock_bh(&tp->lock);
@@ -8321,6 +8600,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
if (!capable(CAP_NET_ADMIN))
return -EPERM;
+ if (tp->link_config.phy_is_low_power)
+ return -EAGAIN;
+
spin_lock_bh(&tp->lock);
err = tg3_writephy(tp, data->reg_num & 0x1f, data->val_in);
spin_unlock_bh(&tp->lock);
@@ -8464,14 +8746,14 @@ static struct ethtool_ops tg3_ethtool_ops = {
static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
{
- u32 cursize, val;
+ u32 cursize, val, magic;
tp->nvram_size = EEPROM_CHIP_SIZE;
- if (tg3_nvram_read(tp, 0, &val) != 0)
+ if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
return;
- if (swab32(val) != TG3_EEPROM_MAGIC)
+ if ((magic != TG3_EEPROM_MAGIC) && ((magic & 0xff000000) != 0xa5000000))
return;
/*
@@ -8479,13 +8761,13 @@ static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
* When we encounter our validation signature, we know the addressing
* has wrapped around, and thus have our chip size.
*/
- cursize = 0x800;
+ cursize = 0x10;
while (cursize < tp->nvram_size) {
- if (tg3_nvram_read(tp, cursize, &val) != 0)
+ if (tg3_nvram_read_swab(tp, cursize, &val) != 0)
return;
- if (swab32(val) == TG3_EEPROM_MAGIC)
+ if (val == magic)
break;
cursize <<= 1;
@@ -8498,6 +8780,15 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp)
{
u32 val;
+ if (tg3_nvram_read_swab(tp, 0, &val) != 0)
+ return;
+
+ /* Selfboot format */
+ if (val != TG3_EEPROM_MAGIC) {
+ tg3_get_eeprom_size(tp);
+ return;
+ }
+
if (tg3_nvram_read(tp, 0xf0, &val) == 0) {
if (val != 0) {
tp->nvram_size = (val >> 16) * 1024;
@@ -8621,6 +8912,44 @@ static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp)
}
}
+static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp)
+{
+ u32 nvcfg1;
+
+ nvcfg1 = tr32(NVRAM_CFG1);
+
+ switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {
+ case FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ:
+ case FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ:
+ case FLASH_5787VENDOR_MICRO_EEPROM_64KHZ:
+ case FLASH_5787VENDOR_MICRO_EEPROM_376KHZ:
+ tp->nvram_jedecnum = JEDEC_ATMEL;
+ tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
+ tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE;
+
+ nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;
+ tw32(NVRAM_CFG1, nvcfg1);
+ break;
+ case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED:
+ case FLASH_5755VENDOR_ATMEL_FLASH_1:
+ case FLASH_5755VENDOR_ATMEL_FLASH_2:
+ case FLASH_5755VENDOR_ATMEL_FLASH_3:
+ tp->nvram_jedecnum = JEDEC_ATMEL;
+ tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
+ tp->tg3_flags2 |= TG3_FLG2_FLASH;
+ tp->nvram_pagesize = 264;
+ break;
+ case FLASH_5752VENDOR_ST_M45PE10:
+ case FLASH_5752VENDOR_ST_M45PE20:
+ case FLASH_5752VENDOR_ST_M45PE40:
+ tp->nvram_jedecnum = JEDEC_ST;
+ tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
+ tp->tg3_flags2 |= TG3_FLG2_FLASH;
+ tp->nvram_pagesize = 256;
+ break;
+ }
+}
+
/* Chips other than 5700/5701 use the NVRAM for fetching info. */
static void __devinit tg3_nvram_init(struct tg3 *tp)
{
@@ -8656,6 +8985,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
tg3_get_5752_nvram_info(tp);
+ else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+ tg3_get_5787_nvram_info(tp);
else
tg3_get_nvram_info(tp);
@@ -8725,6 +9056,34 @@ static int tg3_nvram_exec_cmd(struct tg3 *tp, u32 nvram_cmd)
return 0;
}
+static u32 tg3_nvram_phys_addr(struct tg3 *tp, u32 addr)
+{
+ if ((tp->tg3_flags & TG3_FLAG_NVRAM) &&
+ (tp->tg3_flags & TG3_FLAG_NVRAM_BUFFERED) &&
+ (tp->tg3_flags2 & TG3_FLG2_FLASH) &&
+ (tp->nvram_jedecnum == JEDEC_ATMEL))
+
+ addr = ((addr / tp->nvram_pagesize) <<
+ ATMEL_AT45DB0X1B_PAGE_POS) +
+ (addr % tp->nvram_pagesize);
+
+ return addr;
+}
+
+static u32 tg3_nvram_logical_addr(struct tg3 *tp, u32 addr)
+{
+ if ((tp->tg3_flags & TG3_FLAG_NVRAM) &&
+ (tp->tg3_flags & TG3_FLAG_NVRAM_BUFFERED) &&
+ (tp->tg3_flags2 & TG3_FLG2_FLASH) &&
+ (tp->nvram_jedecnum == JEDEC_ATMEL))
+
+ addr = ((addr >> ATMEL_AT45DB0X1B_PAGE_POS) *
+ tp->nvram_pagesize) +
+ (addr & ((1 << ATMEL_AT45DB0X1B_PAGE_POS) - 1));
+
+ return addr;
+}
+
static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
{
int ret;
@@ -8737,14 +9096,7 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
if (!(tp->tg3_flags & TG3_FLAG_NVRAM))
return tg3_nvram_read_using_eeprom(tp, offset, val);
- if ((tp->tg3_flags & TG3_FLAG_NVRAM_BUFFERED) &&
- (tp->tg3_flags2 & TG3_FLG2_FLASH) &&
- (tp->nvram_jedecnum == JEDEC_ATMEL)) {
-
- offset = ((offset / tp->nvram_pagesize) <<
- ATMEL_AT45DB0X1B_PAGE_POS) +
- (offset % tp->nvram_pagesize);
- }
+ offset = tg3_nvram_phys_addr(tp, offset);
if (offset > NVRAM_ADDR_MSK)
return -EINVAL;
@@ -8769,6 +9121,16 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
return ret;
}
+static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val)
+{
+ int err;
+ u32 tmp;
+
+ err = tg3_nvram_read(tp, offset, &tmp);
+ *val = swab32(tmp);
+ return err;
+}
+
static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp,
u32 offset, u32 len, u8 *buf)
{
@@ -8921,15 +9283,7 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len,
page_off = offset % tp->nvram_pagesize;
- if ((tp->tg3_flags2 & TG3_FLG2_FLASH) &&
- (tp->nvram_jedecnum == JEDEC_ATMEL)) {
-
- phy_addr = ((offset / tp->nvram_pagesize) <<
- ATMEL_AT45DB0X1B_PAGE_POS) + page_off;
- }
- else {
- phy_addr = offset;
- }
+ phy_addr = tg3_nvram_phys_addr(tp, offset);
tw32(NVRAM_ADDR, phy_addr);
@@ -8944,6 +9298,7 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len,
nvram_cmd |= NVRAM_CMD_LAST;
if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) &&
+ (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) &&
(tp->nvram_jedecnum == JEDEC_ST) &&
(nvram_cmd & NVRAM_CMD_FIRST)) {
@@ -9347,6 +9702,7 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
{
unsigned char vpd_data[256];
int i;
+ u32 magic;
if (tp->tg3_flags2 & TG3_FLG2_SUN_570X) {
/* Sun decided not to put the necessary bits in the
@@ -9356,16 +9712,43 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
return;
}
- for (i = 0; i < 256; i += 4) {
- u32 tmp;
+ if (tg3_nvram_read_swab(tp, 0x0, &magic))
+ return;
- if (tg3_nvram_read(tp, 0x100 + i, &tmp))
- goto out_not_found;
+ if (magic == TG3_EEPROM_MAGIC) {
+ for (i = 0; i < 256; i += 4) {
+ u32 tmp;
+
+ if (tg3_nvram_read(tp, 0x100 + i, &tmp))
+ goto out_not_found;
- vpd_data[i + 0] = ((tmp >> 0) & 0xff);
- vpd_data[i + 1] = ((tmp >> 8) & 0xff);
- vpd_data[i + 2] = ((tmp >> 16) & 0xff);
- vpd_data[i + 3] = ((tmp >> 24) & 0xff);
+ vpd_data[i + 0] = ((tmp >> 0) & 0xff);
+ vpd_data[i + 1] = ((tmp >> 8) & 0xff);
+ vpd_data[i + 2] = ((tmp >> 16) & 0xff);
+ vpd_data[i + 3] = ((tmp >> 24) & 0xff);
+ }
+ } else {
+ int vpd_cap;
+
+ vpd_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_VPD);
+ for (i = 0; i < 256; i += 4) {
+ u32 tmp, j = 0;
+ u16 tmp16;
+
+ pci_write_config_word(tp->pdev, vpd_cap + PCI_VPD_ADDR,
+ i);
+ while (j++ < 100) {
+ pci_read_config_word(tp->pdev, vpd_cap +
+ PCI_VPD_ADDR, &tmp16);
+ if (tmp16 & 0x8000)
+ break;
+ msleep(1);
+ }
+ pci_read_config_dword(tp->pdev, vpd_cap + PCI_VPD_DATA,
+ &tmp);
+ tmp = cpu_to_le32(tmp);
+ memcpy(&vpd_data[i], &tmp, 4);
+ }
}
/* Now parse and find the part number. */
@@ -9412,6 +9795,46 @@ out_not_found:
strcpy(tp->board_part_number, "none");
}
+static void __devinit tg3_read_fw_ver(struct tg3 *tp)
+{
+ u32 val, offset, start;
+
+ if (tg3_nvram_read_swab(tp, 0, &val))
+ return;
+
+ if (val != TG3_EEPROM_MAGIC)
+ return;
+
+ if (tg3_nvram_read_swab(tp, 0xc, &offset) ||
+ tg3_nvram_read_swab(tp, 0x4, &start))
+ return;
+
+ offset = tg3_nvram_logical_addr(tp, offset);
+ if (tg3_nvram_read_swab(tp, offset, &val))
+ return;
+
+ if ((val & 0xfc000000) == 0x0c000000) {
+ u32 ver_offset, addr;
+ int i;
+
+ if (tg3_nvram_read_swab(tp, offset + 4, &val) ||
+ tg3_nvram_read_swab(tp, offset + 8, &ver_offset))
+ return;
+
+ if (val != 0)
+ return;
+
+ addr = offset + ver_offset - start;
+ for (i = 0; i < 16; i += 4) {
+ if (tg3_nvram_read(tp, addr + i, &val))
+ return;
+
+ val = cpu_to_le32(val);
+ memcpy(tp->fw_ver + i, &val, 4);
+ }
+ }
+}
+
#ifdef CONFIG_SPARC64
static int __devinit tg3_is_sun_570X(struct tg3 *tp)
{
@@ -9603,6 +10026,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
(tp->tg3_flags2 & TG3_FLG2_5780_CLASS))
tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
@@ -9610,12 +10034,18 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
(tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
tp->tg3_flags2 |= TG3_FLG2_5705_PLUS;
- if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
- tp->tg3_flags2 |= TG3_FLG2_HW_TSO;
+ if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) {
+ tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2;
+ tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
+ } else
+ tp->tg3_flags2 |= TG3_FLG2_HW_TSO_1;
+ }
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752)
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752 &&
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787)
tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE;
if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0)
@@ -9772,7 +10202,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
/* Force the chip into D0. */
- err = tg3_set_power_state(tp, 0);
+ err = tg3_set_power_state(tp, PCI_D0);
if (err) {
printk(KERN_ERR PFX "(%s) transition to D0 failed\n",
pci_name(tp->pdev));
@@ -9825,7 +10255,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0)
tp->tg3_flags2 |= TG3_FLG2_PHY_5704_A0_BUG;
- if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
+ if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) &&
+ (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787))
tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG;
tp->coalesce_mode = 0;
@@ -9925,6 +10356,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
}
tg3_read_partno(tp);
+ tg3_read_fw_ver(tp);
if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) {
tp->tg3_flags &= ~TG3_FLAG_USE_MI_INTERRUPT;
@@ -9960,10 +10392,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
else
tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES;
- /* It seems all chips can get confused if TX buffers
+ /* All chips before 5787 can get confused if TX buffers
* straddle the 4GB address boundary in some cases.
*/
- tp->dev->hard_start_xmit = tg3_start_xmit;
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+ tp->dev->hard_start_xmit = tg3_start_xmit;
+ else
+ tp->dev->hard_start_xmit = tg3_start_xmit_dma_bug;
tp->rx_offset = 2;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 &&
@@ -10491,7 +10926,6 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
tp->link_config.speed = SPEED_INVALID;
tp->link_config.duplex = DUPLEX_INVALID;
tp->link_config.autoneg = AUTONEG_ENABLE;
- netif_carrier_off(tp->dev);
tp->link_config.active_speed = SPEED_INVALID;
tp->link_config.active_duplex = DUPLEX_INVALID;
tp->link_config.phy_is_low_power = 0;
@@ -10550,6 +10984,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
case PHY_ID_BCM5752: return "5752";
case PHY_ID_BCM5714: return "5714";
case PHY_ID_BCM5780: return "5780";
+ case PHY_ID_BCM5787: return "5787";
case PHY_ID_BCM8002: return "8002/serdes";
case 0: return "serdes";
default: return "unknown";
@@ -10848,11 +11283,12 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE;
}
- /* TSO is off by default, user can enable using ethtool. */
-#if 0
- if (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE)
+ /* TSO is on by default on chips that support hardware TSO.
+ * Firmware TSO on older chips gives lower performance, so it
+ * is off by default, but can be enabled using ethtool.
+ */
+ if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
dev->features |= NETIF_F_TSO;
-#endif
#endif
@@ -10896,7 +11332,11 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
* checksumming.
*/
if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) {
- dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+ dev->features |= NETIF_F_HW_CSUM;
+ else
+ dev->features |= NETIF_F_IP_CSUM;
+ dev->features |= NETIF_F_SG;
tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS;
} else
tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS;
@@ -10949,6 +11389,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
(pdev->dma_mask == DMA_32BIT_MASK) ? 32 :
(((u64) pdev->dma_mask == DMA_40BIT_MASK) ? 40 : 64));
+ netif_carrier_off(tp->dev);
+
return 0;
err_out_iounmap:
@@ -11044,7 +11486,7 @@ static int tg3_resume(struct pci_dev *pdev)
pci_restore_state(tp->pdev);
- err = tg3_set_power_state(tp, 0);
+ err = tg3_set_power_state(tp, PCI_D0);
if (err)
return err;
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 7e3b613..baa34c4 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -138,6 +138,7 @@
#define ASIC_REV_5752 0x06
#define ASIC_REV_5780 0x08
#define ASIC_REV_5714 0x09
+#define ASIC_REV_5787 0x0b
#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
#define CHIPREV_5700_AX 0x70
#define CHIPREV_5700_BX 0x71
@@ -1393,6 +1394,7 @@
#define GRC_MDI_CTRL 0x00006844
#define GRC_SEEPROM_DELAY 0x00006848
/* 0x684c --> 0x6c00 unused */
+#define GRC_FASTBOOT_PC 0x00006894 /* 5752, 5755, 5787 */
/* 0x6c00 --> 0x7000 unused */
@@ -1436,6 +1438,13 @@
#define FLASH_5752VENDOR_ST_M45PE10 0x02400000
#define FLASH_5752VENDOR_ST_M45PE20 0x02400002
#define FLASH_5752VENDOR_ST_M45PE40 0x02400001
+#define FLASH_5755VENDOR_ATMEL_FLASH_1 0x03400001
+#define FLASH_5755VENDOR_ATMEL_FLASH_2 0x03400002
+#define FLASH_5755VENDOR_ATMEL_FLASH_3 0x03400000
+#define FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ 0x03000003
+#define FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ 0x03000002
+#define FLASH_5787VENDOR_MICRO_EEPROM_64KHZ 0x03000000
+#define FLASH_5787VENDOR_MICRO_EEPROM_376KHZ 0x02000000
#define NVRAM_CFG1_5752PAGE_SIZE_MASK 0x70000000
#define FLASH_5752PAGE_SIZE_256 0x00000000
#define FLASH_5752PAGE_SIZE_512 0x10000000
@@ -2185,7 +2194,7 @@ struct tg3 {
#define TG3_FLG2_PHY_SERDES 0x00002000
#define TG3_FLG2_CAPACITIVE_COUPLING 0x00004000
#define TG3_FLG2_FLASH 0x00008000
-#define TG3_FLG2_HW_TSO 0x00010000
+#define TG3_FLG2_HW_TSO_1 0x00010000
#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000
#define TG3_FLG2_5705_PLUS 0x00040000
#define TG3_FLG2_5750_PLUS 0x00080000
@@ -2198,6 +2207,9 @@ struct tg3 {
#define TG3_FLG2_PARALLEL_DETECT 0x01000000
#define TG3_FLG2_ICH_WORKAROUND 0x02000000
#define TG3_FLG2_5780_CLASS 0x04000000
+#define TG3_FLG2_HW_TSO_2 0x08000000
+#define TG3_FLG2_HW_TSO (TG3_FLG2_HW_TSO_1 | TG3_FLG2_HW_TSO_2)
+#define TG3_FLG2_1SHOT_MSI 0x10000000
u32 split_mode_max_reqs;
#define SPLIT_MODE_5704_MAX_REQ 3
@@ -2247,6 +2259,7 @@ struct tg3 {
#define PHY_ID_BCM5752 0x60008100
#define PHY_ID_BCM5714 0x60008340
#define PHY_ID_BCM5780 0x60008350
+#define PHY_ID_BCM5787 0xbc050ce0
#define PHY_ID_BCM8002 0x60010140
#define PHY_ID_INVALID 0xffffffff
#define PHY_ID_REV_MASK 0x0000000f
@@ -2258,6 +2271,7 @@ struct tg3 {
u32 led_ctrl;
char board_part_number[24];
+ char fw_ver[16];
u32 nic_sram_data_cfg;
u32 pci_clock_ctrl;
struct pci_dev *pdev_peer;
@@ -2271,7 +2285,8 @@ struct tg3 {
(X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
(X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
(X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
- (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM8002)
+ (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
+ (X) == PHY_ID_BCM8002)
struct tg3_hw_stats *hw_stats;
dma_addr_t stats_mapping;
diff --git a/drivers/net/wan/sbni.c b/drivers/net/wan/sbni.c
index db2c798..175ba13 100644
--- a/drivers/net/wan/sbni.c
+++ b/drivers/net/wan/sbni.c
@@ -1495,8 +1495,7 @@ module_param(skip_pci_probe, bool, 0);
MODULE_LICENSE("GPL");
-int
-init_module( void )
+int __init init_module( void )
{
struct net_device *dev;
int err;
generated by cgit v0.10.2 at 2024-11-04 11:36:14 (GMT)