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2014-03-31dpa_offload: Add DTS for supporting DPA IPSec Multiple Instances on T4240Andrei Varvara
New dts for T4240 required in order to support multipe IPSec instances. Add 3 offline ports for FMAN 1. Add another macless device. Signed-off-by: Andrei Varvara <andrei.varvara@freescale.com> Change-Id: I4180dafc83efc0c645754e3614ab2bf646cbf8bd Reviewed-on: http://git.am.freescale.net:8181/10481 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-31powerpc: set the correct ksp_limit on ppc32 when switching to irq stackKevin Hao
Guenter Roeck has got the following call trace on a p2020 board: Kernel stack overflow in process eb3e5a00, r1=eb79df90 CPU: 0 PID: 2838 Comm: ssh Not tainted 3.13.0-rc8-juniper-00146-g19eca00 #4 task: eb3e5a00 ti: c0616000 task.ti: ef440000 NIP: c003a420 LR: c003a410 CTR: c0017518 REGS: eb79dee0 TRAP: 0901 Not tainted (3.13.0-rc8-juniper-00146-g19eca00) MSR: 00029000 <CE,EE,ME> CR: 24008444 XER: 00000000 GPR00: c003a410 eb79df90 eb3e5a00 00000000 eb05d900 00000001 65d87646 00000000 GPR08: 00000000 020b8000 00000000 00000000 44008442 NIP [c003a420] __do_softirq+0x94/0x1ec LR [c003a410] __do_softirq+0x84/0x1ec Call Trace: [eb79df90] [c003a410] __do_softirq+0x84/0x1ec (unreliable) [eb79dfe0] [c003a970] irq_exit+0xbc/0xc8 [eb79dff0] [c000cc1c] call_do_irq+0x24/0x3c [ef441f20] [c00046a8] do_IRQ+0x8c/0xf8 [ef441f40] [c000e7f4] ret_from_except+0x0/0x18 --- Exception: 501 at 0xfcda524 LR = 0x10024900 Instruction dump: 7c781b78 3b40000a 3a73b040 543c0024 3a800000 3b3913a0 7ef5bb78 48201bf9 5463103a 7d3b182e 7e89b92e 7c008146 <3ba00000> 7e7e9b78 48000014 57fff87f Kernel panic - not syncing: kernel stack overflow CPU: 0 PID: 2838 Comm: ssh Not tainted 3.13.0-rc8-juniper-00146-g19eca00 #4 Call Trace: The reason is that we have used the wrong register to calculate the ksp_limit in commit cbc9565ee826 (powerpc: Remove ksp_limit on ppc64). Just fix it. As suggested by Benjamin Herrenschmidt, also add the C prototype of the function in the comment in order to avoid such kind of errors in the future. Cc: stable@vger.kernel.org # 3.12 Reported-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Kevin Hao <haokexin@gmail.com>
2014-03-31dpaa_eth: minor improvements for oNICMarian Rotariu
1. correct kernel 3.12 checkpatch errors These error are related to the copyright comments at the beginning of each file and to the usage of seq_puts for non-formatted strings. 2. create specific frame queue initialization function Now, the frame queues are initialized with the standard DPAA Ethernet function. With this patch a specific initialization function that does not have CGR or configurmation queues is created for oNIC. 3. remove unuseful operations from buffer pool probing function There is no need for physical address of the buffers since the buffers are in kernel memory space. Also, the fill of the buffer pools is done when the interface is raised removing the need for a standard seeding callback. 4. add support for mac address modification If the user tries to modify the mac address he will receive "operation not supported". With this patch you will be able to add a different mac address. This is a "virtual" mac address recognized only in the kernel. oNIC does not have a mac device underneath. Change-Id: I8e3d884105f2e8f96667b2f83df16761464be6e7 Signed-off-by: Marian Rotariu <marian.rotariu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10495 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
2014-03-28dpa_offload: dpa_ipsec - SEC outbound fqid for SABogdan Constantin Popescu
This commit adds support for DPA IPSec functionality in order to get the frame queue id to SEC for a given outbound SA. This will allow the upper layer to bypass outbound policy lookup and directly apply IPSec encryption on a packet. Change-Id: I06203798f50d08aefff32a64c551890225dbcd62 Signed-off-by: Bogdan Constantin Popescu <bogdan.c.popescu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10453 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28gianfar: Moving inline static function to gianfar.hAlok Makhariya
Static inline function used by ASF moved to gianfar.h CQ ID : ENGR00304852 Signed-off-by: Alok Makhariya <B46187@freescale.com> Change-Id: Iafbc62267be60064625305c97dbee1fc8d15a4ec Reviewed-on: http://git.am.freescale.net:8181/10477 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Claudiu Manoil <claudiu.manoil@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28Revert "GIANFAR : Porting ASF to non-DPA platform."Alok Makhariya
This reverts commit b018ec06c1b954a319a714dcbca3ae7c7b56f0d1. Change-Id: I4434d2beb0d0da456e9cd142f573809aa240793b CQ ID : ENGR00304852 Signed-off-by: Alok Makhariya <B46187@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10350 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rajan Gupta <rajan.gupta@freescale.com> Reviewed-by: Claudiu Manoil <claudiu.manoil@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28srio_ipsec_offload: add a dts file for srio_ipsec_offload applicationb38734
Signed-off-by: b38734 <pinghua.an@freescale.com> Change-Id: I02d6a01a8903ce8ea575d459f6cc5b4f9cc5df2e Reviewed-on: http://git.am.freescale.net:8181/10404 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28gianfar: Add IEEE 1588 V2 supportYangbo Lu
This patch integrates the IEEE 1588 specification v2 ioctls with the gianfar driver. The user space application should be IXXAT IEEE1588 stack v1.04 or above. Signed-off-by: Sandeep Gopalpet <sandeep.kumar@freescale.com> Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com> Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Change-Id: Ic7c3b4f2d5dd92d4e8e82dea3d41df8e75cf3559 Reviewed-on: http://git.am.freescale.net:8181/10331 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Claudiu Manoil <claudiu.manoil@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28dts b4/t4: Added generic ethernet node for oNIC and two oh portsVakul Garg
OH ports serve as tx/rx points for oNIC Signed-off-by: Sandeep Singh <sandeep@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Change-Id: I7896a19ea05f6b09ee8559e7a2895be9c8c0de3d Reviewed-on: http://git.am.freescale.net:8181/10007 Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jianhua Xie <jianhua.xie@freescale.com> Reviewed-by: Marian Cristian Rotariu <marian.rotariu@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28dpa_offload: Fix ioctl for dpa_ipsec_get_statsAndrei Varvara
The intance ID should be given by user when reading the statistics for a DPA IPSec instance. Updated ioctl and wrapper code accordingly. Signed-off-by: Andrei Varvara <andrei.varvara@freescale.com> Change-Id: Ie2a7232d2bc5e9fe63aa4655b2623a0d7303a4db Reviewed-on: http://git.am.freescale.net:8181/10394 Reviewed-by: Marian-Cornel Chereji <marian.chereji@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Radu-Andrei Bulie <Radu.Bulie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/dts: Add 1588 timer node for eTSECYangbo Lu
Add 1588 timer node in files: arch/powerpc/boot/dts/bsc9131rdb.dtsi arch/powerpc/boot/dts/bsc9132qds.dtsi arch/powerpc/boot/dts/p1010rdb.dtsi arch/powerpc/boot/dts/p1020rdb-pd.dtsi arch/powerpc/boot/dts/p1021rdb-pc.dtsi arch/powerpc/boot/dts/p1022ds.dtsi arch/powerpc/boot/dts/p1025twr.dtsi arch/powerpc/boot/dts/p2020rdb-pc.dtsi Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Change-Id: I8b402cb7cca0f97ccec2b3ee2e948dee833f98c1 Reviewed-on: http://git.am.freescale.net:8181/10400 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28Revert "powerpc/watchdog: Don't enable interrupt on PPC64 BookE"Scott Wood
This reverts commit 3978bdb4ed653342b0be66c031bf61b72cc55d60, now that critical interrupts are properly supported on ppc64 booke. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Wim Van Sebroeck <wim@iguana.be> Change-Id: I9d0eae461856d2fab1e3edf6a8ca14e3e1dae608 Reviewed-on: http://git.am.freescale.net:8181/10270 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/booke64: Critical and machine check exception supportScott Wood
Add special state saving for critical and machine check exceptions. Most of this code could be used to handle debug exceptions taken from kernel space, but actually doing so is outside the scope of this patch. The various critical and machine check exceptions now point to their real handlers, rather than hanging the kernel. Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: Id3ef3d2c17b582508f36c10a4d0e96e540ca5284 Reviewed-on: http://git.am.freescale.net:8181/10269 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/booke64: Add crit/mc/debug support to EXCEPTION_COMMONScott Wood
Use the proper scratch SPRG and PACA region. Introduce level-specific macros to simplify usage and avoid needing to do a bunch of token pasting throughout EXCEPTION_COMMON(). Now that EXCEPTION_COMMON_DBG() is properly using the debug scratch register, there's no more need for the caller to move the value to the GEN scratch first. Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: I0abdf08d724e0238bdc1eee44bd5a72fa88f7b22 Reviewed-on: http://git.am.freescale.net:8181/10268 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/booke64: Remove ints from EXCEPTION_COMMONScott Wood
The ints parameter was used to optionally insert RECONCILE_IRQ_STATE into EXCEPTION_COMMON. However, since it came at the end of EXCEPTION_COMMON, there was no real benefit for it to be there as opposed to being called separately by the caller of EXCEPTION_COMMON. The ints parameter was causing some hassle when trying to add an extra macro layer. Besides avoiding that, moving "ints" to the caller makes the code simpler by: - avoiding the asymmetry where INTS_RESTORE_HARD is called separately by the individual exception, but INTS_DISABLE was not - removing the no-op INTS_KEEP - not having an unnecessary macro parameter It also turned out to be necessary to delay the INTS_DISABLE in the case of special level exceptions until after we saved the old value of PACAIRQHAPPENED. Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: I18dcc5f81c8fe7a830147e70eadebe64e2c4a218 Reviewed-on: http://git.am.freescale.net:8181/10267 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/booke64: Use SPRG_TLB_EXFRAME on bolted handlersScott Wood
While bolted handlers (including e6500) do not need to deal with a TLB miss recursively causing another TLB miss, nested TLB misses can still happen with crit/mc/debug exceptions -- so we still need to honor SPRG_TLB_EXFRAME. We don't need to spend time modifying it in the TLB miss fastpath, though -- the special level exception will handle that. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Mihai Caraman <mihai.caraman@freescale.com> Cc: kvm-ppc@vger.kernel.org Change-Id: I56f8a4007275654a03e29010e7e64d70db46bf1c Reviewed-on: http://git.am.freescale.net:8181/10266 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/booke64: Use SPRG7 for VDSOScott Wood
Previously SPRG3 was marked for use by both VDSO and critical interrupts (though critical interrupts were not fully implemented). In commit 8b64a9dfb091f1eca8b7e58da82f1e7d1d5fe0ad ("powerpc/booke64: Use SPRG0/3 scratch for bolted TLB miss & crit int"), Mihai Caraman made an attempt to resolve this conflict by restoring the VDSO value early in the critical interrupt, but this has some issues: - It's incompatible with EXCEPTION_COMMON which restores r13 from the by-then-overwritten scratch (this cost me some debugging time). - It forces critical exceptions to be a special case handled differently from even machine check and debug level exceptions. - It didn't occur to me that it was possible to make this work at all (by doing a final "ld r13, PACA_EXCRIT+EX_R13(r13)") until after I made (most of) this patch. :-) It might be worth investigating using a load rather than SPRG on return from all exceptions (except TLB misses where the scratch never leaves the SPRG) -- it could save a few cycles. Until then, let's stick with SPRG for all exceptions. Since we cannot use SPRG4-7 for scratch without corrupting the state of a KVM guest, move VDSO to SPRG7 on book3e. Since neither SPRG4-7 nor critical interrupts exist on book3s, SPRG3 is still used for VDSO there. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Mihai Caraman <mihai.caraman@freescale.com> Cc: Anton Blanchard <anton@samba.org> Cc: Paul Mackerras <paulus@samba.org> Cc: kvm-ppc@vger.kernel.org Change-Id: Ibc9f776435583a75c04e7662d5a863cae3b2ab6b Reviewed-on: http://git.am.freescale.net:8181/10265 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/e6500: Make TLB lock recursiveScott Wood
Once special level interrupts are supported, we may take nested TLB misses -- so allow the same thread to acquire the lock recursively. The lock will not be effective against the nested TLB miss handler trying to write the same entry as the interrupted TLB miss handler, but that's also a problem on non-threaded CPUs that lack TLB write conditional. This will be addressed in the patch that enables crit/mc support by invalidating the TLB on return from level exceptions. Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: I1c485fe78f289e038c318863f175b5fdc345afe6 Reviewed-on: http://git.am.freescale.net:8181/10264 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/booke64: Fix exception numbersScott Wood
altivec_unavailable was commented as 0xf20 but the code uses 0x200. Note that 0xf20 is also used by ap_unavailable. altivec_assist was commented as 0x1700 but the code uses 0x220. critical_input was commented as 0x580 but the code uses 0x100. machine_check was commented and implemented as 0x200, which conflicts with altivec_assist (it only builds because MC_EXCEPTION_PROLOG is commented out). Changed to the fixed IVOR value of 0x000. Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: Iddc30b69eb4aa8ab804f6023e2cf9e36105aa1d3 Reviewed-on: http://git.am.freescale.net:8181/10263 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/book3e: store crit/mc/dbg exception thread infoTiejun Chen
We need to store thread info to these exception thread info like something we already did for PPC32. Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: I4c41e2a6b7b9994a8f2015a175f8b5e5454af223 Reviewed-on: http://git.am.freescale.net:8181/10261 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/book3e: initialize crit/mc/dbg kernel stack pointersTiejun Chen
We already allocated critical/machine/debug check exceptions, but we also should initialize those associated kernel stack pointers for use by special exceptions in the PACA. Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: Ide9ef2f6b0c1dc43041d908a923cabcd7fe5f492 Reviewed-on: http://git.am.freescale.net:8181/10260 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/mpic_timer: fix convert ticks to time subtraction overflowWang Dongsheng
In some cases tmp_sec may be greater than ticks, because in the process of calculation ticks and tmp_sec will be rounded. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: I9bad7ea037144da4e1b3a00e6af52f8687f01ffe Reviewed-on: http://git.am.freescale.net:8181/10341 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/mpic_timer: fix the time is not accurate caused by GTCRR toggle bitWang Dongsheng
When the timer GTCCR toggle bit is inverted, we calculated the rest of the time is not accurate. So we need to ignore this bit. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: I6b5228af46a31184b50b8feb7f5da64858fdc054 Reviewed-on: http://git.am.freescale.net:8181/10340 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/p1022ds: add a interrupt for rtc nodeWang Dongsheng
Add an external interrupt for rtc node. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: Ic3c180401a848ee6515912ab2ec6419fbc79b432 Reviewed-on: http://git.am.freescale.net:8181/10339 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/p1022ds: fix rtc compatible stringWang Dongsheng
RTC Hardware(ds3232) and rtc compatible string does not match. Change "dallas,ds1339" to "dallas,ds3232". Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Change-Id: Id86048db4f618ac4a97aec2d70c10404cface0b7 Reviewed-on: http://git.am.freescale.net:8181/10338 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28crypto: caam/qi - add support for TLS 1.0 recordHoria Geanta
TLS 1.0 descriptors run on SEC Era 4 or higher. For now, only tls10(hmac(sha1),cbc(aes)) algorithm is registered by the driver. Change-Id: Ie8f761652f17a7a9e976a7371392c9b49cd5fe9b Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10385 Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28crypto: caam/qi - fix aead sglen for case 'dst != src'Horia Geanta
Commit bbf9c8934ba2bfd5fd809562f945deaf5a565898 (crypto: caam - fix aead sglen for case 'dst != src') fixed an oops that showed up when not encrypting in-place. This patch does the same thing, but for caam/qi. Change-Id: If898604e04c41a443b6e1673e924673d50530a4d Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10384 Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28crypto: testmgr - add test vector for TLS1.0 AES128-CBC-SHA1Cristian Stoica
This test vector exercises encryption and decryption with a payload large enough to be non-trivial. Change-Id: Iecca48fc21a44a6f1e9fecddc8c349c7a822c5c0 Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10084 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit f76b14b48bb051bd9b873aeb49ab7fa5d8badce5) Reviewed-on: http://git.am.freescale.net:8181/10383 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com>
2014-03-28crypto: testmgr - code clean-up on TLS testsCristian Stoica
Change-Id: Ic1248e27fabf787434dabd1303e0bdfdd78732b6 Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10083 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit d076de0815bfd49181d8d660349ccc1f69e27932) Reviewed-on: http://git.am.freescale.net:8181/10382 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com>
2014-03-28crypto: tls - fix encryption for buffers larger than 4KbCristian Stoica
This fixes a defect in TLS driver that prevents correct encryption of buffers larger than a single page. The scatterlists were incorrectly chained and data above 4Kb was not encrypted. Change-Id: I9bf558055312f14e5acb3ba99f8d14d3f89aad07 Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10082 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 02cc641eaeccc7dbb422f20e28b2022f48074268) Reviewed-on: http://git.am.freescale.net:8181/10381 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com>
2014-03-28crypto: tls - reduce helper function arityCristian Stoica
This helper function calculates the padded digest and sets the length of the result as a side-effect. Doing more than this increases complexity with no visible advantage. This patch removes a calculation that can be done by the caller. Change-Id: Ifb5ec2b47cde824837065985230a19bdd1f0af88 Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10081 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit c89e8db964f0c280bd773b4bcc27a156a3e9d871) Reviewed-on: http://git.am.freescale.net:8181/10380 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com>
2014-03-28crypto: tls - drop redundant callbackCristian Stoica
Cipher completion can be signaled by the base (aead) request. There is no need for another function to do that Change-Id: I6e0bcfdeebfd6d9d3151d9eb9549c98a87e2ccf2 Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10080 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit e91688b30c6132b873752a4d3870e50e47911428) Reviewed-on: http://git.am.freescale.net:8181/10379 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com>
2014-03-28crypto: caam - fix tls1.0 encrypt for large packetsTudor Ambarus
The descriptor tries to push more data into the IFIFO than its size (128 bytes) or existing free space and the DECO hangs. Drain the IFIFO before loading data into it. Signed-off-by: Tudor Ambarus <tudor.ambarus@freescale.com> Change-Id: Ie59760908b821f9c64273d83f4a8cf00e45e08df Reviewed-on: http://git.am.freescale.net:8181/9991 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Horia Ioan Geanta Neag <horia.geanta@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 215baf1dc9baf5504cec0e176b390499862e4b09) Reviewed-on: http://git.am.freescale.net:8181/10378 Reviewed-by: Mircea Pop <mircea.pop@freescale.com>
2014-03-28crypto: caam - fix tls1.0 decrypt for zero pre ICV length caseHoria Geanta
The tls1.0 decrypt crypto engine descriptor did not handle correctly the case when the ciphertext contained only the authentication tag and padding (i.e. pre ICV length is zero). While here, add a test vector in test manager for this case. Change-Id: Ic3b12f1f9581b992b49d73f335d2ec991d92f1ad Signed-off-by: Tudor Ambarus <tudor.ambarus@freescale.com> Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/7063 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com> (cherry picked from commit 5c235b1ce4ad0b53e86fe157b4add7079934f614) Reviewed-on: http://git.am.freescale.net:8181/10377 Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28crypto: caam - do not register algorithms for unsupported SEC ErasHoria Geanta
Commit 33de5f5c7455aea05b48d46f3024f78ecc83dc4b (crypto: caam - add support for TLS 1.0 record) added support for TLS 1.0 offloading, mentioning that the feature is available for platforms having SEC Era 4 or above. However, this doesn't stop one to actually run this feature on platforms not supported (for e.g. P3041DS), leading to errors like: platform ffe303000.jr: 40002807: DECO: desc idx 40: Invalid LOAD Command Add a .min_era member for each algorithm registered by the driver, specifying the lowest (compatible) SEC Era on which the descriptors can run. Change-Id: Idf929591361d244a4d7cd8352d0fb8ad7feff830 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/7118 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> (cherry picked from commit 351d2c869e446187bc78f47dccb0213f0a5e9f17) Conflicts: drivers/crypto/caam/caamalg.c drivers/crypto/caam/ctrl.c drivers/crypto/caam/intern.h Change-Id: I615578f0d0693eb46742e65004435821f6eb7de7 Reviewed-on: http://git.am.freescale.net:8181/10374 Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28crypto: caam - add support for TLS 1.0 recordHoria Geanta
TLS 1.0 descriptors run on SEC Era 4 or higher. For now, only tls10(hmac(sha1),cbc(aes)) algorithm is registered by the driver. Change-Id: I98a71d8eb61a0e5f2dd65835e99b1c906468bf52 Signed-off-by: Tudor Ambarus <tudor.ambarus@freescale.com> Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10376 Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28crypto: testmgr - fix tls encrypt testvec for zero plaintextHoria Geanta
The test vector for zero plaintext tls encrypt had a typo in it: the pre ICV len (last two bytes of assoc data) were being set to "00 10" instead of "00 00". This caused the result (SHA1 + padding) to be different than expected. Change-Id: I81ef14f0e1f8660854ad2faaf13bc2a9fdca5755 Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/7062 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com> (cherry picked from commit dd23644ca6c56cb3b8ee5b3d6c22e3ee6c17f957) Reviewed-on: http://git.am.freescale.net:8181/10375 Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28crypto: add support for TLS 1.0 record encryptionCristian Stoica
This patch adds kernel support for encryption/decryption of TLS 1.0 records using block ciphers. Implementation is similar to authenc in the sense that the base algorithms (AES, SHA1) are combined in a template to produce TLS encapsulation frames. The composite algorithm will be called "tls10(hmac(<digest>),cbc(<cipher>))". The cipher and hmac keys are wrapped in the same format used by authenc.c Change-Id: If2211062f1e8805ee1fe9e6684e7c0902bf44467 Signed-off-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/6211 Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit e2fe61d3fe94949f9fc5766f7b27a1d19c9d4d6e) Conflicts: crypto/tcrypt.c Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Change-Id: I6ecb63c7cb8c64aef984e71e439dab6000666b29 Reviewed-on: http://git.am.freescale.net:8181/10373 Reviewed-by: Cristian Stoica <cristian.stoica@freescale.com> Reviewed-by: Mircea Pop <mircea.pop@freescale.com> Reviewed-by: Alexandru Porosanu <alexandru.porosanu@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28Add RSA keygen request for SKMMJiucheng Xu
Signed-off-by: Jiucheng Xu <Jiucheng.Xu@freescale.com> Change-Id: I10e8467953cf8524a2848f4b474952ea54ed7868 Reviewed-on: http://git.am.freescale.net:8181/6049 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10198 Reviewed-by: Mingkai Hu <Mingkai.Hu@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28fsl/usb : Workaround for USB Erratum A007792Nikhil Badola
USB controller version-2.5 requires to enable internal UTMI phy and program PTS field in PORTSC register before asserting controller reset. This is must for successful resetting of the controller and subsequent enumeration of usb devices Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Change-Id: Ibebdc44bf75f5da69f2e9b6346bfecb442a784b0 Reviewed-on: http://git.am.freescale.net:8181/10301 Reviewed-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-28powerpc/phy: add config function to enable interrupt AT8033Zhao Qiang
AT8033 can't work well with auto-negotiation. Add .config_intr and .ack_interrupt functions for at8033_driver to config AT8033 to enable interrupt for auto-negotiation. Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I47b539cf5fc9da52c6980e95e1bd105621abf102 Reviewed-on: http://git.am.freescale.net:8181/10282 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-27offline_port: add functionality for OH port driverMarian Rotariu
Historically the offline port driver did not initialize the frame queues that entered and exited the OH port and relied on software components (Ethernet driver, USDPAA, other kernel modules) to initialize those queues. The last major modification in the offline port driver added capabilities to initialize ingress queues (queues that enter the Offline Port) simplifying the work for the Ethernet driver, but maintaining the same complexity in USDPAA and/or other kernel modules. This patch adds full capability for initializing both ingress and egress queues, eliminating the dependency on USDPAA and/or other kernel modules. With it, complex offload architectures that have OH ports can be largely initialized by the offline port driver. The additional device tree attributes that this patch adds are optional and do not interfere with the current code. Therefore, backward compatibility is maintained. This patch also simplifies the initialization of the hardware used by the macless or the newer Ethernet driver, oNIC. Test scenarios (mainly unit tests) can be created without using USDPAA or Offload Driver. The device tree format for the new attributes is: fsl,qman-frame-queues-ingress = <base_id1 count1 ... base_idn countn>; fsl,qman-frame-queues-egress = <base_id1 count1 ... base_idn countn>; fsl,qman-channel-ids-egress = <channel_id1 ... channel_idn>; The above queues are connected only to DC portals. Frame queues connected to SW portals should be created from another software entity. Also, if a frame queue uses different initialization parameters it should be created by another software entity. Change-Id: I0fffc6116bbf543542c30eb6225b2a76945d3813 Signed-off-by: Marian Rotariu <marian.rotariu@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9648 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Reviewed-by: Bogdan Purcareata <bogdan.purcareata@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 43c88bc759c12472262788d8f39dd3d79c6f5e44) Reviewed-on: http://git.am.freescale.net:8181/10296
2014-03-27fmd: Magic Packet interrupt handlingCristian Sovaiala
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Change-Id: If203b15d0f34b4ace5bd8cb911af1ebf93aa5621 Reviewed-on: http://git.am.freescale.net:8181/10396 Reviewed-by: Igal Liberman <Igal.Liberman@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Tested-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> (cherry picked from commit e8a3fbfddce62f064132632b16682f3dac093e77) Reviewed-on: http://git.am.freescale.net:8181/10403
2014-03-27dpaa_eth: Add support for Wake on LanCristian Sovaiala
Currently the system wakes up from sleep mode on Magic Packets. The ports that are configured as Auto Response will not have the WoL feature enabled. Magic Packets are not yet supported on those ports. Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Change-Id: I579494dab0a0e918a2644483129951d370cbccf9 Reviewed-on: http://git.am.freescale.net:8181/9904 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 0d0575e647c95c988148a107839a1c1f31baa420) Reviewed-on: http://git.am.freescale.net:8181/10401 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Tested-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-03-27fmd: Add IRQF_NO_SUSPEND flag to fman error interruptCristian Sovaiala
Magic Packets are processed in Fman error interrupt therefore in order for the error interrupt to be handled while the system is in sleep mode, we set the IRQF_NO_SUSPEND flag when the interrupt is being registered. Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Change-Id: Iff2fec80452a1af42ffc9a639bed555d896a57af Reviewed-on: http://git.am.freescale.net:8181/9903 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 3cc4c999ce457e5a99ae0cac7626106b9a551511) Reviewed-on: http://git.am.freescale.net:8181/10399 Tested-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-03-27fmd: Add support for WoL in FMan wrapperCristian Sovaiala
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Change-Id: I244de770e6b6e86855c57db19940e58da846f1c6 Reviewed-on: http://git.am.freescale.net:8181/9902 Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com> Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Tested-by: Jose Rivera <German.Rivera@freescale.com> (cherry picked from commit 639b1743204984ab49f6d5a0f57fa94d76dcbf22) Reviewed-on: http://git.am.freescale.net:8181/10387 Tested-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-03-26gianfar: Move TxFIFO underrun handling to reset pathClaudiu Manoil
Handle TxFIFO underrun exceptions outside the fast path. A controller reset is more reliable in this exceptional case, as opposed to re-enabling on-the-fly the Tx DMA. As the controller reset is handled outside the fast path by the reset_gfar() workqueue handler, the locking scheme on the Tx path is significantly simplified. Because the Tx processing (xmit queues and tx napi) is disabled during controller reset, tstat access from xmit does not require locking. So the scope of the txlock on the processing path is now reduced to num_txbdfree, which is shared only between process context (xmit) and softirq (clean_tx_ring). As a result, the txlock must not guard against interrupt context, and the spin_lock_irqsave() from xmit can be relaced by faster spin_lock_bh(). Locking restrictions can be reduced for clean_tx_ring() as well. Change-Id: Ib1fb6fe8d0d59fbf0abb7c39cf6b52c112a8a2cb Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/9989 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Rajan Gupta <rajan.gupta@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-26fsl_qbman: remove unnecessary call to put_affine_portal()Meenakshi Aggarwal
In bman_create_affine_slave() function : - we used put_affine_portal() which should be called along with get_affine_portal() or get_raw_affine_portal(). - unnecessary call to put_affine_portal() leaves the function in invalid state and resulted in kernel panic. Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@freescale.com> Signed-off-by: Priyanka Jain <priyanka.jain@freescale.com> Change-Id: I52a98c18b20d6f83f86ce462005f43e26fa1bdd9 Reviewed-on: http://git.am.freescale.net:8181/10283 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Priyanka Jain <Priyanka.Jain@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
2014-03-26T1040RDB/dts: Add UCC hdlc node for QUICC EngineZhao Qiang
T1040RDB don't have the UCC uart port, change UCC uart node to UCC hdlc node. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I5608746d9e31f1dd74b5574e6dd4f95963f0f8cb Reviewed-on: http://git.am.freescale.net:8181/10008 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/10279
2014-03-26t1040qds/dts: Add qe node for t1040Zhao Qiang
add qe node into file arch/powerpc/boot/dts/fsl/t1040si-post.dtsi Signed-off-by: Zhao Qiang <B45475@freescale.com> Change-Id: I7de5a4fe3c30130d3b00e3e9dd84a6193b38caf4 Reviewed-on: http://git.am.freescale.net:8181/10278 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com> Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
generated by cgit v0.10.2 at 2024-07-09 20:37:35 (GMT)