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path: root/arch/microblaze/include/asm/cpuinfo.h
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2011-07-25microblaze: Unprivileged stream instruction awarenessJohn A. Williams
Add cpuinfo support for the new MicroBlaze option permitting userspace (unprivileged) access to the streaming instructions (FSL / AXI-stream). Emit a noisy warning at bootup if this is enabled, because bad user code can potentially lockup the CPU. Signed-off-by: John A. Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-03-09microblaze: Fix sparse warning - cpuinfo.hMichal Simek
Warning log: CHECK arch/microblaze/kernel/cpu/cpuinfo-static.c arch/microblaze/include/asm/cpuinfo.h:101:21: warning: incorrect type in argument 1 (different signedness) arch/microblaze/include/asm/cpuinfo.h:101:21: expected unsigned int const [usertype] *p arch/microblaze/include/asm/cpuinfo.h:101:21: got int *[assigned] val ... Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-21microblaze: Support timer on AXI liteMichal Simek
New microblaze systems uses two buses. One for memories and flashes and the second for low-speed peripherals which can run on different CLK. This is the reason why the kernel is trying to read clock-frequency directly from node. If there is then the kernel will work with it. If not then cpu CLK is used. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-21microblaze: Add support for little-endian MicroblazeMichal Simek
Microblaze little-endian toolchain exports __MICROBLAZEEL__ which is used in the kernel to identify little/big endian. The most of the changes are in loading values from DTB which is always big endian. Little endian platforms are based on new AXI bus which has impact to early uartlite initialization. Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-21microblaze: Add PVR for endians plus detectionMichal Simek
Upcomming microblaze version will support little-endian. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2009-12-14microblaze: Extend cpuinfo for support write-back cachesMichal Simek
There is missing checking agains PVR but this is not important for now. There are some missing checking too. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-12-14microblaze: Fix cache_line_lenghtMichal Simek
We used cache_line as cache_line_lenght. For this reason we did cache flushing 4 times longer than was necessary. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-03-27microblaze_v8: Cpuinfo handlingMichal Simek
Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>