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d31c342 Merge branch 'sdk-kernel-3.8' into master
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I9d5f3f45bfe4b01583ba0469a405dac13b723aac
Reviewed-on: http://git.am.freescale.net:8181/4680
Reviewed-by: Emilian Medve <Emilian.Medve@freescale.com>
Tested-by: Emilian Medve <Emilian.Medve@freescale.com>
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git rebase --continue
Linux 3.10
Conflicts:
Documentation/virtual/kvm/api.txt
arch/ia64/kvm/Makefile
arch/powerpc/Kconfig
arch/powerpc/Makefile
arch/powerpc/boot/dts/b4420qds.dts
arch/powerpc/boot/dts/b4860qds.dts
arch/powerpc/boot/dts/b4qds.dts
arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
arch/powerpc/boot/dts/fsl/b4si-post.dtsi
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi
arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
arch/powerpc/boot/dts/p1025rdb_36b.dts
arch/powerpc/boot/dts/t4240qds.dts
arch/powerpc/configs/corenet64_smp_defconfig
arch/powerpc/configs/mpc85xx_defconfig
arch/powerpc/configs/mpc85xx_smp_defconfig
arch/powerpc/include/asm/cputable.h
arch/powerpc/include/asm/kvm_host.h
arch/powerpc/include/asm/kvm_ppc.h
arch/powerpc/include/asm/machdep.h
arch/powerpc/include/uapi/asm/kvm.h
arch/powerpc/kernel/cpu_setup_fsl_booke.S
arch/powerpc/kernel/cputable.c
arch/powerpc/kernel/idle.c
arch/powerpc/kernel/pci-common.c
arch/powerpc/kvm/Kconfig
arch/powerpc/kvm/book3s.c
arch/powerpc/kvm/booke.c
arch/powerpc/kvm/e500.c
arch/powerpc/kvm/e500_mmu.c
arch/powerpc/kvm/e500_mmu_host.c
arch/powerpc/kvm/e500mc.c
arch/powerpc/kvm/emulate.c
arch/powerpc/kvm/irq.h
arch/powerpc/kvm/mpic.c
arch/powerpc/kvm/powerpc.c
arch/powerpc/mm/tlb_nohash.c
arch/powerpc/platforms/85xx/Kconfig
arch/powerpc/platforms/85xx/b4_qds.c
arch/powerpc/platforms/85xx/t4240_qds.c
arch/powerpc/platforms/pseries/smp.c
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
arch/powerpc/sysdev/fsl_msi.c
arch/powerpc/sysdev/fsl_pci.c
arch/powerpc/sysdev/fsl_pci.h
arch/powerpc/sysdev/mpic.c
arch/x86/kvm/Makefile
arch/x86/kvm/x86.c
drivers/Kconfig
drivers/clk/Kconfig
drivers/cpufreq/Makefile
drivers/crypto/caam/caamalg.c
drivers/crypto/caam/intern.h
drivers/crypto/caam/jr.c
drivers/crypto/caam/regs.h
drivers/infiniband/ulp/ipoib/ipoib_ethtool.c
drivers/iommu/Makefile
drivers/iommu/amd_iommu.c
drivers/iommu/exynos-iommu.c
drivers/iommu/intel-iommu.c
drivers/iommu/iommu.c
drivers/iommu/msm_iommu.c
drivers/iommu/omap-iommu.c
drivers/iommu/tegra-gart.c
drivers/iommu/tegra-smmu.c
drivers/misc/Makefile
drivers/mmc/card/block.c
drivers/mmc/card/queue.c
drivers/mmc/core/core.c
drivers/mtd/nand/fsl_ifc_nand.c
drivers/net/ethernet/3com/3c501.c
drivers/net/ethernet/8390/3c503.c
drivers/net/ethernet/dec/ewrk3.c
drivers/net/ethernet/freescale/fec.c
drivers/net/ethernet/freescale/gianfar.c
drivers/net/ethernet/freescale/gianfar.h
drivers/net/ethernet/i825xx/3c505.c
drivers/net/ethernet/i825xx/3c507.c
drivers/rtc/rtc-ds3232.c
drivers/s390/net/qeth_core_main.c
drivers/staging/Kconfig
drivers/staging/Makefile
drivers/staging/ccg/u_ether.c
drivers/usb/gadget/fsl_udc_core.c
drivers/usb/otg/fsl_otg.c
drivers/vfio/vfio.c
drivers/watchdog/Kconfig
include/linux/iommu.h
include/linux/kvm_host.h
include/linux/mmc/sdhci.h
include/linux/msi.h
include/linux/netdev_features.h
include/linux/pci.h
include/linux/skbuff.h
include/net/ip6_route.h
include/net/sch_generic.h
include/net/xfrm.h
include/uapi/linux/kvm.h
net/core/netpoll.c
virt/kvm/irqchip.c
virt/kvm/kvm_main.c
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B4860 has 1 PPC core cluster and 3 DSP core clusters.
Similarly B4420 has 1 PPC core cluster and 1 DSP core cluster.
Each DSP core cluster consists of 2 SC3900 cores and a shared L2 cache.
1. Add DSP clusters for B4420
2. Reorganized the L2 cache nodes such that they now appear in only the
soc specific dtsi files(b4860si-post.dtsi and b4420si-post.dtsi).
Earlier they were shown partly in common b4si-post.dtsi and si specific
b4860si-post.dtsi files .
3. Fixed an issue in b4860si-pre.dtsi, now DSP cluster correctly point to their
respective L2 caches
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Change-Id: Ie09007f4c596fc5947e0b4b005225b8b1f9aa443
Reviewed-on: http://git.am.freescale.net:8181/4005
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
Tested-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
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- Add dsp nodes in B4860 pre silicon device file
- Add L2 cache nodes for dsp/Starcores in B4860 post silicon file
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Change-Id: I10329607b97961a44f46bc814032fc9faa0e7f96
Reviewed-on: http://git.am.freescale.net:8181/3693
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Reviewed-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
Tested-by: Rivera Jose-B46482 <Jose.G.Rivera@freescale.com>
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- Add dsp nodes in B4860 pre silicon device file
- Add L2 cache nodes for dsp/Starcores in B4860 post silicon file
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Change-Id: I10329607b97961a44f46bc814032fc9faa0e7f96
Reviewed-on: http://git.am.freescale.net:8181/3693
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Sethi Varun-B16395 <Varun.Sethi@freescale.com>
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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For B4 platform, MPIC EISR register is in reversed bitmap order,
instead of "Error interrupt source 0-31. Bit 0 represents SRC0."
the correct ordering is "Error interrupt source 0-31. Bit 0
represents SRC31." This patch is to fix sRIO and RMan EISR bit
value of error interrupts in dts node.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Change-Id: I3eacf5ebee6da5ac847d6ab93fe1e38a07e57176
Reviewed-on: http://git.am.freescale.net:8181/3616
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Reviewed-by: Schmitt Richard-B43082 <B43082@freescale.com>
Tested-by: Schmitt Richard-B43082 <B43082@freescale.com>
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For B4 platform, MPIC EISR register is in reversed bitmap order,
instead of "Error interrupt source 0-31. Bit 0 represents SRC0."
the correct ordering is "Error interrupt source 0-31. Bit 0
represents SRC31." This patch is to fix sRIO and RMan EISR bit
value of error interrupts in dts node.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Change-Id: I3eacf5ebee6da5ac847d6ab93fe1e38a07e57176
Reviewed-on: http://git.am.freescale.net:8181/3616
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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This will allow future code to simply check the pci-e controller
version register plus getting rid of the redundant version from
within the compatible string.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Change-Id: I7211a7c426f9e11920369355900ccd236fc248a1
Reviewed-on: http://git.am.freescale.net:8181/2670
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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In case of B4 LIODN regsiter for sRIO is not in GUTs block
but in the sRIO register space.
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Change-Id: I88e92aec7f1125fa7d2ad1113d97afacc1dfeebc
Reviewed-on: http://git.am.freescale.net:8181/2453
Reviewed-by: Yoder Stuart-B08248 <stuart.yoder@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Update the clockgen node in dts for B4420QDS and B4860QDS.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I13c8216a0bc1b750897c0343211fc6f57b991c60
Reviewed-on: http://git.am.freescale.net:8181/2397
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Li Yang-R58472 <LeoLi@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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For those SoCs with QMan rev >= 3.0, BMan rev >= 2.1, the portals number varies
from SoC to SoC, so we add the exact supported portals into SoC's post-dtsi so
that the correct number of portals will be initialized for that SoC.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Change-Id: Ic5453cd001e9ff32297d23cab609298392b6fe53
Reviewed-on: http://git.am.freescale.net:8181/2308
Reviewed-by: Ladouceur Jeffrey-R11498 <Jeffrey.Ladouceur@freescale.com>
Reviewed-by: Thorpe Geoff-R01361 <Geoff.Thorpe@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Change-Id: I10b0bb444cfe59047bca166c74eab38f77916dc0
Reviewed-on: http://git.am.freescale.net:8181/1334
Reviewed-by: Aggrwal Poonam-B10812 <Poonam.Aggrwal@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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B4860 has 6 1G SGMII and 2 10G interfaces
B4420 has 4 1G SGMII and no 10G
The QDS board has 2 on board SGMII PHYs and other 1G interfaces can be
exercised using SGMII Riser card mounted on a slot on AMC card.
10G interfaces can be used using XAUI riser cards on slots on AMC card.
Also included e6500_power_isa.dtsi in b4si-post.dtsi to match up with T4.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Change-Id: I58231f43a75ebfa63bb9c9b3f6717848f0f6f6ed
Reviewed-on: http://git.am.freescale.net:8181/1358
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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The register layout of the CCF block
present in b4860 matches the one on t4240.
Thus, the corenet-cf node device tree node
should have the same compatible as t4240.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Change-Id: I4a33551c93c97af97a30a972ec12899b7e48042c
Reviewed-on: http://git.am.freescale.net:8181/1470
Reviewed-by: Leekha Shaveta-B20052 <shaveta@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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B4860 and B4420 are similar that share some commonalities
* common features have been added in b4si-pre.dtsi and b4si-post.dtsi
* differences are added in respective silicon files of B4860 and B4420
There are several things missing from the device trees of B4860 and B4420:
* DPAA related nodes (Qman, Bman, Fman, Rman)
* DSP related nodes/information
* serdes, sfp(security fuse processor), thermal,
gpio, maple, cpri, quad timers nodes
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Existing B4 support required to be cleaned as
B4 base support would be cherry-picked from upstream
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Change-Id: I623c04aa6381eba64c98b5e31eeba875d9f85050
Reviewed-on: http://git.am.freescale.net:8181/1224
Reviewed-by: Aggrwal Poonam-B10812 <Poonam.Aggrwal@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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B4860 and B4420 are similar that share some commonalities
* common features have been added in b4si-pre.dtsi and b4si-post.dtsi
* differences are added in respective silicon files of B4860 and B4420
There are several things missing from the device trees of B4860 and B4420:
* DPAA related nodes (Qman, Bman, Fman, Rman)
* DSP related nodes/information
* serdes, sfp(security fuse processor), thermal,
gpio, maple, cpri, quad timers nodes
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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This reverts commit 7a8b241fba87dac3d52f3af01cf8382b75b72ccd
I'm guessing it was applied accidentally. To be frank, it doesn't look like most of my comments from the previous version were resolved by this version.
Change-Id: I9af40bff5021a432f7fad805771ec4d6c4fc39b7
Reviewed-on: http://git.am.freescale.net:8181/1012
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Change-Id: Ib970be5f9529532d8f6b2fd19092d41d0237ef6a
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/854
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Change-Id: I3bb380c88d7edaf62ff8f237b68d780085904bd5
Reviewed-on: http://git.am.freescale.net:8181/568
Reviewed-by: Phillips Kim-R1AAHA <Kim.Phillips@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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