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This will allow future code to simply check the pci-e controller
version register plus getting rid of the redundant version from
within the compatible string.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Change-Id: I7211a7c426f9e11920369355900ccd236fc248a1
Reviewed-on: http://git.am.freescale.net:8181/2670
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Change-Id: Iaa01d6bd23139f73c563b2218ba28f9ef96212bb
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/2545
Reviewed-by: Wang Dongsheng-B40534 <dongsheng.wang@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Li Yang-R58472 <LeoLi@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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P1020, P1021, P1022, P1023 when the lbc get error, the error
interrupt will be triggered. The corresponding interrupt is
internal IRQ0. So system have to process the lbc IRQ0 interrupt.
The corresponding lbc general interrupt is internal IRQ3
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: Ice300265ca9e6bec361b8804ebe97677bbbc5db8
Reviewed-on: http://git.am.freescale.net:8181/2468
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Wood Scott-B07421 <scottwood@freescale.com>
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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The crypto node now contains a new property 'fsl,sec-era'.
This is required so that applications can retrieve era info without
having to be able to read SEC's register space.
Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The Datapath Acceleration Architecture devices are added to
the SOCs which make use of them. Compile-tested only.
The big changes from 1.3:
1) PAMU support now updated in each device to reflect new
architecture which specifies the PAMU topology.
2) Virtual MDIO drivers are now specified using the new
generic architecture.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Change-Id: Id287a528bf94067aa60f721916462f0797161d89
Reviewed-on: http://git.am.freescale.net:8181/911
Reviewed-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
Tested-by: Fleming Andrew-AFLEMING <AFLEMING@freescale.com>
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Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com>
Signed-off-by: Hai-Ying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
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Add usb controller version info for the following:
MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041,
P3041, P3060, P5020
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Dropping "fsl,p1023-IP..." from compatibles for standard blocks
* Removed incorrect power/pmc node, there are no etsec on P1023
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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