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2015-04-28powerpc/t10xx/dts: Remove software feature node from platform dtJianhua Xie
Configurable node based on software feature should not appear in platform dt, since platform dt should only describe hardware. If some software features depend on some kinds of hardware, those software should share those hardware, and provide configurable capabilities in run-time. At least, a separate device tree with usdpaa style for software features will instead to keep platform dt clear. This patch removes software feature related offline port nodes and buffer pool nodes from t10xx platform dt. Change-Id: Ib367f9facfdd6743a704f863728a7f2e0e7955ce Suggested-by: Pan Jiafei <Jiafei.Pan@freescale.com> Suggested-by: Madalin Bucur <madalin.bucur@freescale.com> Suggested-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com> Reviewed-on: http://git.am.freescale.net:8181/35429 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Madalin-Cristian Bucur <madalin.bucur@freescale.com>
2014-12-11powerpc/t1024: some update for t1024Shengzhou Liu
- enable mixed mode of MPIC for deep sleep - add deep sleep support for t1024 - add SDXC support for T1024QDS - add TDM node in dts for Maxim DS26522 Riser card. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Zhao Qiang <B45475@freescale.com> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I9cb45b4a02814a4f4cd0a320510361c424545d44 Reviewed-on: http://git.am.freescale.net:8181/21426 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
2014-12-11powerpc/fsl-booke: Add T102x QDS board supportShengzhou Liu
Add support for Freescale T1024/T1023 QorIQ Development System Board. T1024QDS is a high-performance computing evaluation, development and test platform for T1024 QorIQ Power Architecture processor. T1024QDS board Overview ----------------------- - T1024 SoC integrating two 64-bit e5500 cores up to 1.4GHz - CoreNet fabric supporting coherent and noncoherent transactions with prioritization and bandwidth allocation - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Accelerator: DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC - Ethernet interfaces: - Two 10M/100M/1G RGMII ports on-board - Three 1G/2.5Gbps SGMII ports - Four 1Gbps QSGMII ports - one 10Gbps XFI or 10G Base-KR interface - SerDes: 4 lanes up to 10.3125GHz Supporting SGMII/QSGMII, XFI, PCIe, SATA and Aurora - PCIe: Three PCI Express controllers with five PCIe slots. - IFC: 128MB NOR Flash, 2GB NAND Flash, PromJet debug port and Qixis FPGA - Video: DIU supports video up to 1280x1024x32 bpp. - Chrontel CH7201 for HDMI connection. - TI DS90C387R for direct LCD connection. - Raw (not encoded) video connector for testing or other encoders. - QUICC Engine block - 32-bit RISC controller for flexible support of the communications peripherals - Serial DMA channel for receive and transmit on all serial channels - Two universal communication controllers, supporting TDM, HDLC, and UART - Deep sleep power management implementaion (wakeup from GPIO/Timer/Ethernet/USB) - eSPI: Three SPI flash devices. - SATA: one SATA 2.O. - USB: Two USB2.0 ports with internal PHY (one Type-A and one micro Type mini-AB) - eSDHC: Support SD, SDHC, SDXC and MMC/eMMC. - I2C: Four I2C controllers. - UART: Two UART on board. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Change-Id: I8d4f93e21c2f6d76fa09144994e9724596a3a601 Reviewed-on: http://git.am.freescale.net:8181/21421 Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com> Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>