Age | Commit message (Collapse) | Author |
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Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: Id21f861ffec995ad68378a9d2eda245ef989b489
Reviewed-on: http://git.am.freescale.net:8181/19009
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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qe-hdlc worked in internal-loopback without TDMR ds26522,
now it can work with TDMR ds26522 in normal mode,
so modify it to normal mode.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: I7eeb4ec196d74cb53f3bffced0889637c72ed5d6
Reviewed-on: http://git.am.freescale.net:8181/19008
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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add slic tdm node into t1040rdb.dts
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: I1862ebef1b7bfd5a43258afbd62bcfe417dc61c0
Reviewed-on: http://git.am.freescale.net:8181/19000
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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the device tree is walked in a bottom-up order to suspend devices.
Callback sequence of devices is determinated by the first
time it appears in device tree not where it is defined, thus add
two placeholders of bqman before fman to make sure fman suspended
before bqman.
Signed-off-by: Zhang Zhuoyu <Zhuoyu.Zhang@freescale.com>
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This reverts commit 062853ac8f4b6fb5fee1770b67d4684023929e10.
New PBI-based workaround which resets PVR register for
erratum A-008007 is implemented in RCW. So no workaround
implementation is required in Linux
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Change-Id: I6d952796efda066fd648179dd9508a0f8c4c2ba2
Reviewed-on: http://git.am.freescale.net:8181/15311
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Tested-by: Richard Schmitt <richard.schmitt@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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T1042RDB is Freescale Reference Design Board supporting
the T1042 QorIQ Power Architecture processor.
T1042RDB board Overview
-----------------------
- SERDES Connections, 8 lanes supporting:
- PCI
- SGMII
- SATA 2.0
- DDR Controller
- Supports rates of up to 1600 MHz data-rate
- Supports one DDR3LP UDIMM
- IFC/Local Bus
- NAND flash: 1GB 8-bit NAND flash
- NOR: 128MB 16-bit NOR Flash
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- CPLD
- Clocks
- System and DDR clock (SYSCLK, DDRCLK)
- SERDES clocks
- Power Supplies
- USB
- Supports two USB 2.0 ports with integrated PHYs
- Two type A ports with 5V@1.5A per port.
- SDHC
- SDHC/SDXC connector
- SPI
- On-board 64MB SPI flash
- I2C
- Devices connected: EEPROM, thermal monitor, VID controller
- Other IO
- Two Serial ports
- ProfiBus port
Add support for T1042 RDB board:
-add device tree
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Change-Id: I4dd5e168e4e6e62e10a362ec41b1edc33f988731
Reviewed-on: http://git.am.freescale.net:8181/15312
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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Signed-off-by: Eyal Harari <Eyal.Harari@freesacle.com>
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Enlarge kernel image nor-patition for some P1/P2 boards that include
p1020rdb-pd, p1021rdb-pc, p1022ds, p1025twr, and p2020rdb-pc.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Lu Yangbo <yangbo.lu@freescale.com>
Change-Id: I7306a062dfea47a6d8daf278c7f608cdab3b5684
Reviewed-on: http://git.am.freescale.net:8181/13437
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhenhua Luo <zhenhua.luo@freescale.com>
Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com>
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Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Change-Id: I87bcb0d65f2cc9a1ebc129290ad1284d2a1f8b18
Reviewed-on: http://git.am.freescale.net:8181/13000
Reviewed-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
Tested-by: Richard Schmitt <richard.schmitt@freescale.com>
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These dt files re-allocates the fman resources to the ports
so that they are stretched close to the fman possible limit
Change-Id: Ia803628186132db8e2969d8c252d869d2cbdb3a8
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/13298
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Nir Erez <nir.erez@freescale.com>
Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
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Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: I143c1f42c3ed6b69dafce3f22dbc9640a48f667b
Reviewed-on: http://git.am.freescale.net:8181/13083
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Vakul Garg <vakul@freescale.com>
Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
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Nand partitions cannot idetify when PIXIS is indirect model.
When DIU not enable, we need to keep the pixis is direct model.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: I028ed60c3677e8d16d01e4bad0f3a4a393ab8ab4
Reviewed-on: http://git.am.freescale.net:8181/13035
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Zhengxiong Jin <Jason.Jin@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Zhenhua Luo <zhenhua.luo@freescale.com>
Tested-by: Zhenhua Luo <zhenhua.luo@freescale.com>
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The c293pcie board is an endpoint device, and it does't need PM.
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Change-Id: I5d20c0a0f85ef8c7141d36f9f085515fa8055541
Reviewed-on: http://git.am.freescale.net:8181/13003
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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DPA eth driver for shared ethernet requires one Tx FQ for each core.
Since T2080 has 8 cores, we change number of Tx FQs for shared ethernet
to 8.
Signed-off-by: Vakul Garg <vakul@freescale.com>
Change-Id: Ie4b78e7fc71a8e0cbea0f04cf104478c27dbabcf
Reviewed-on: http://git.am.freescale.net:8181/13041
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Sandeep Singh <sandeep@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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t1040rdb has two on-board SLIC devices.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: Ic26669b39ac2287cc89dfc88ed5500fbf5177f07
Reviewed-on: http://git.am.freescale.net:8181/12412
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: I1866c9373f05c484bcb9ffeab3691c389ca5df58
Reviewed-on: http://git.am.freescale.net:8181/7231
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
(cherry picked from commit 305cd35d3f9636d292dfaef6e6bdc885aaa43862)
Reviewed-on: http://git.am.freescale.net:8181/12336
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Add device tree for TDM on QorIQ chips.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: Ia05e43d3e4ef265cc01489ab26fb8359c1ff55f2
Reviewed-on: http://git.am.freescale.net:8181/7230
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
(cherry picked from commit 23a3ae0454a1560c3b9a5ff12465f5122184c9f2)
Reviewed-on: http://git.am.freescale.net:8181/12335
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Add missing qoriq-dpaa-res3.dtsi and qoriq-qman-ceetm0.dtsi
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: I7cdbb743340d0809e3fa11270ff0af63494a0f09
Reviewed-on: http://git.am.freescale.net:8181/12878
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Commit e2929e1e0ab910995090ce0714beab75618db694 "powerpc/e6500: Make
TLB lock recursive" introduced a bug whereby cpu 0 uses the same value
for "lock held" as is used to indicate that the lock is free. This
means that cpu 1 can acquire the lock whenever it wants, regardless of
whether cpu 0 has it locked, which in turn means we can get duplicate
TLB entries.
Add one to the CPU value to ensure we do not use zero as a "lock held"
value.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Change-Id: I8c8013adc2e153f19d780a3b202c993054feb47f
Reviewed-on: http://git.am.freescale.net:8181/12823
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mihai Claudiu Caraman <mihai.caraman@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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By default we enable CONFIG_RTC_DRV_DS1307 to support
DS1339 RTC on some boards.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: Ic0370434e00ff4616b2ea563a0e3e8b99efa649a
Reviewed-on: http://git.am.freescale.net:8181/12665
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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- fix i2c nodes for pca9546, adt7481, rtc ds1339, eeprom.
- remove incorrect sst25wf040 device node, only one Micron
n25q512a on t2080rdb.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: I4c0d6a549e5f7164ec14cb2e59468ca14df19317
Reviewed-on: http://git.am.freescale.net:8181/12663
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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- update SPI nodes to support 3 SPI devices: Micron n25q128a11,
SST sst25wf040 and EON en25s64.
- remove unnecessary spi partition nodes, which is replaced by mtdparts.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: I20cf48f886507d5c31859d8a2e3491f4489bb518
Reviewed-on: http://git.am.freescale.net:8181/12662
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Previously TID was being cleared before the tlbsx, but not after. This
can lead to a multiway hit between a TLB entry with TID=0 (previously
inserted when PID=0) and a TLB entry with TID!=0 that matches PID.
This can theoretically result in undefined behavior, though we probably
get lucky due to the details of the overlap. It also results in the
inability to use multihit detection to detect other conflicting TLB
entries, as well as poorer TLB utilization due to duplicating kernel
TLB entries.
Rather than try to patch up MAS1 after tlbsx, the entire value is
saved/restored as with MAS2.
I observed a slight improvement in TLB miss performance with this patch
applied.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reported-by: Ed Swarthout <ed.swarthout@freescale.com>
Change-Id: Ia756411e110c245781357a3b1985fade648d791a
Reviewed-on: http://git.am.freescale.net:8181/12509
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Edward L Swarthout <ed.swarthout@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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A ioport setting was needed when used the QE uart function on TWR-P1025.
Added a conditional definition to avoid missing this setting when the
QE-uart driver was bulit to a module.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Change-Id: I95b40c760335ce5fa7a27a94287dbef28219b5fa
Reviewed-on: http://git.am.freescale.net:8181/6643
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Thomas Trefny <Tom.Trefny@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/12045
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Erratum A-008007 states that PVR register value is unreliable for
e5500 cores (Major revision 1.0, Minor revision 2.0) which are
present in T1040 Rev1.0 SoC.
This workaround implementation
-adds a new config option 'CONFIG_FSL_ERRATUM_A_008007' in t1040
specific defconfig files. This config option is used to make
sure that changes does not impact non-T1040 platforms.
-replaces mfspr(x) macro defintion to check if above erratum is
defined and if x is same as SPRN_PVR, then return static value
else call mfspr instruction.
-Similarly replaces mfpvr() calls
TODO:
1.Use some cleaner approach like reading SVR rgeister or parse
device tree to check if T1040 Rev1.0 Si instead of using config option.
2.This patch only replaces current accesses of PVR register but
does not restrict any new code which tries to read this.
A mechanism needs to be implemented to restrict this.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Change-Id: Ib5f17dec01ca0d98c5f506b1be23dfe06a541015
Reviewed-on: http://git.am.freescale.net:8181/12350
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add 1588 timer node in file:
arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Change-Id: I1dbbcab7ed38d136d3d8bd589adbf5e451db612c
Reviewed-on: http://git.am.freescale.net:8181/12433
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Change-Id: I8acfcfe0da35031c20b55a67626f0fbe13a42246
Signed-off-by: Mandy Lavi <mandy.lavi@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/12367
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Nir Erez <nir.erez@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Signed-off-by: Scott Wood <scottwood@freescale.com>
Conflicts:
arch/sparc/Kconfig
drivers/tty/tty_buffer.c
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This fixes below compilation error on SOCs where CONFIG_PHYS_64BIT
is not defined:
arch/powerpc/kvm/e500_mmu_host.c: In function 'kvmppc_e500_shadow_map':
| arch/powerpc/kvm/e500_mmu_host.c:631:20: error: 'PTE_WIMGE_SHIFT' undeclared (first use in this function)
| wimg = (*ptep >> PTE_WIMGE_SHIFT) & MAS2_WIMGE_MASK;
| ^
| arch/powerpc/kvm/e500_mmu_host.c:631:20: note: each undeclared identifier is reported only once for each function it appears in
| make[1]: *** [arch/powerpc/kvm/e500_mmu_host.o] Error 1
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Change-Id: Ic49cf6dab73f05b7eed751c2fa6bc6182f178cdc
Reviewed-on: http://git.am.freescale.net:8181/12214
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add fsl_set_power_except() for setting powerdown exception when sleep.
The drivers can call this function to set the corresponding bits if
the devices will power down when sleep.
This patch also fixed an issue which is that FMan ports can not work after
wake-up from deep sleep using Wake-on-LAN. Set FMan bit and MAC bits of the
register IPPDEXPCR seperately, instead of setting them together.
Change-Id: I8f632efb8ca54a5d32deb7ee1d42b333fa66d5cd
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Reviewed-on: http://git.am.freescale.net:8181/12219
Reviewed-by: Yang Li <LeoLi@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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According to T1040RM Rev D, 04/2014, T1 has not as many
FM_MAX_NUM_OF_OH_PORTS as the ones in T4240, there are
only 4 Offline/Host Command Ports (O/H n) in T1. So oh5
is not available.
This patch is replacing oh5 with oh2 in T1 dts.
Signed-off-by: Jianhua Xie <jianhua.xie@freescale.com>
Change-Id: I99be60539aad6d9999dd8198fd5b0e98ecef7ca0
Reviewed-on: http://git.am.freescale.net:8181/12242
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Mandy Lavi <Mandy.Lavi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add power sensor chip ina220 nodes in dts to support
power monitor
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I7973e6c259f7189d077c798ca914bb4bf6d7dd98
Reviewed-on: http://git.am.freescale.net:8181/12206
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add power sensor chip ina220 node in dts to support
power monitor
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I2e250ad72ddc0cf226aabff515b9b0e4e72b3ff6
Reviewed-on: http://git.am.freescale.net:8181/12205
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Hongtao Jia <hongtao.jia@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Basically, this patch does the following:
1. Move the codes of parsing boot parameters from setup-common.c
to driver. In this way, code reader can know directly that
there are boot parameters that can change the timeout.
2. Make boot parameter 'booke_wdt_period' effective.
currently, when driver is loaded, default timeout is always
being used in stead of booke_wdt_period.
3. Wrap up the watchdog timeout in device struct and clean up
unnecessary codes.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Change-Id: I1d605067e39e3805a539f079e86934b38fa7d224
Reviewed-on: http://git.am.freescale.net:8181/12196
Reviewed-by: Yang Li <LeoLi@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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By default we enable CONFIG_I2C_MUX and CONFIG_I2C_MUX_PCA954x,
which are needed on T2080QDS, T4240QDS, B4860QDS.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: Ic897fb8d0cd2f06fe110d2d73f021fb8a1168aaf
Reviewed-on: http://git.am.freescale.net:8181/12213
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Virtualized environments expose a e6500 dual-threaded core
as two single-threaded e6500 cores. Take advantage of this
and get rid of the tlb lock and the trap-causing tlbsx in
the htw miss handler by guarding with CPU_FTR_SMT, as it's
already being done in the bolted tlb1 miss handler.
As results below show, lmbench random memory access
latency test shows an improvement of ~34%.
Memory latencies in nanoseconds - smaller is better
(WARNING - may not be correct, check graphs)
----------------------------------------------------
Host Mhz L1 $ L2 $ Main mem Rand mem
--------- --- ---- ---- -------- --------
smt 1665 1.8020 13.2 83.0 1149.7
nosmt 1665 1.8020 13.2 83.0 758.1
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Change-Id: Ia6c028b8bb9c847d46d32f788a7257527cd6af09
Reviewed-on: http://git.am.freescale.net:8181/12089
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Richard Schmitt <richard.schmitt@freescale.com>
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EP device bar address will lost when EP device in D3 state,
But when system thaw out from hibernation freezen, EP bar address
not be restored in thaw flow.
The pci framework provide arch-specific hooks(pcibios_pm_ops) when
a PCI device is doing a hibernate transition, so register
fsl_pci_thaw_noirq into pcibios_pm_ops to fix this issue, the
fsl_pci_thaw_noirq will call pci_restore_state() to restore EP bar
address.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Change-Id: I11b68737dd9aafc99f4b7571558529c37e8a648b
Reviewed-on: http://git.am.freescale.net:8181/12031
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yang Li <LeoLi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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T4240QDS and T4240RDB have the third DMA engine
controller. So add corresponding DMA node into
dts file.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Change-Id: I52a1a7786ce7c8b457d4c1c532a6d50b28c08544
Reviewed-on: http://git.am.freescale.net:8181/12078
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Linux supports maximum two 10G per FMAN. t2080qds has
four 10G ports. Removing two 10G from usdpaa device-tree
till this gets fixed.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: I4c868131f79b6ba43dffea198d73c95425b09ce4
Reviewed-on: http://git.am.freescale.net:8181/12050
Reviewed-by: Vakul Garg <vakul@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Linux supports maximum two 10G per FMAN. t2080rdb has
four 10G ports. Removing two 10G from usdpaa device-tree
till this gets fixed.
Signed-off-by: Sandeep Singh <sandeep@freescale.com>
Change-Id: I490684739bf7dea1978e0eba9be1a213dfb386fe
Reviewed-on: http://git.am.freescale.net:8181/12049
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Vakul Garg <vakul@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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KVM uses same WIM tlb attributes as the corresponding qemu pte.
For this we now search the linux pte for the requested page and
get these cache caching/coherency attributes from pte.
Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Change-Id: Idfbf48fd839fecaff6996f42ffa8c2ec35c1455d
Reviewed-on: http://git.am.freescale.net:8181/11892
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
Tested-by: Jose Rivera <German.Rivera@freescale.com>
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When using rcw_0x6d_0x2d, the PHY address(combined with MAC2)
of SGMII card in slot3 is 0x1f instead of 0x1d.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Change-Id: Ie9c61b6056e5e29e492a534c034a9cfa41b9a2f0
Reviewed-on: http://git.am.freescale.net:8181/12046
Reviewed-by: Xiaobo Xie <X.Xie@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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This patch disables CONFIG_NETFILTER from 913x defconfigs.
This flag is used by Application Specific Fastpath(ASF) but
ASF is not enabled in these configs so no point enabling it
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Change-Id: I699da60d33ac89e682aa8528f800aa696ee54326
Reviewed-on: http://git.am.freescale.net:8181/11921
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Naveen Burmi <NaveenBurmi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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This patch removes lot of deprecated config flags from 913x
defconfigs. Some of them are:
- CONFIG_EXPERIMENTAL
- CONFIG_MTD_CHAR
- CONFIG_ARPD
- CONFIG_MII
Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Change-Id: I83ca07888d40c30c71f50a839ba27f34eb6acd7b
Reviewed-on: http://git.am.freescale.net:8181/11920
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Naveen Burmi <NaveenBurmi@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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On booke, "struct tlbe_ref" contains host tlb mapping information
(pfn: for guest-pfn to pfn, flags: attribute associated with this mapping)
for a guest tlb entry. So when a guest creates a TLB entry then
"struct tlbe_ref" is set to point to valid "pfn" and set attributes in
"flags" field of the above said structure. When a guest TLB entry is
invalidated then flags field of corresponding "struct tlbe_ref" is
updated to point that this is no more valid, also we selectively clear
some other attribute bits, example: if E500_TLB_BITMAP was set then we clear
E500_TLB_BITMAP, if E500_TLB_TLB0 is set then we clear this.
Ideally we should clear complete "flags" as this entry is invalid and does not
have anything to re-used. The other part of the problem is that when we use
the same entry again then also we do not clear (started doing or-ing etc).
So far it was working because the selectively clearing mentioned above
actually clears "flags" what was set during TLB mapping. But the problem
starts coming when we add more attributes to this then we need to selectively
clear them and which is not needed.
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Change-Id: Ie94b2607a1493a96632d72c1752a7a4e9e82cb84
Reviewed-on: http://git.am.freescale.net:8181/11891
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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We need to search linux "pte" to get "pte" attributes for setting TLB in KVM.
This patch defines a lookup_linux_ptep() function which returns pte pointer.
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Change-Id: Idaae1def20e8c12dc1245252ddf6d7ccea60c76d
Reviewed-on: http://git.am.freescale.net:8181/11890
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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lookup_linux_pte() is doing more than lookup, updating the pte,
so for clarity it is renamed to lookup_linux_pte_and_update()
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Reviewed-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Change-Id: I02be9c728fd679b64000205da2605ea89c1d92bc
Reviewed-on: http://git.am.freescale.net:8181/11889
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Stuart Yoder <stuart.yoder@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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Add the missing platform compatible string so that
the kernel can boot under hypervisor.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Change-Id: Ifbbf8fff0927b1c9f39ac648d5b1ba2e5b139186
Reviewed-on: http://git.am.freescale.net:8181/11838
Reviewed-by: Diana Madalina Craciun <Diana.Craciun@freescale.com>
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Jose Rivera <German.Rivera@freescale.com>
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[ Upstream commit cb3042d609e30e6144024801c89be3925106752b ]
In arch_cpu_idle() we must enable %pil based interrupts before
potentially invoking the hypervisor cpu yield call.
As per the Hypervisor API documentation for cpu_yield:
Interrupts which are blocked by some mechanism other that
pstate.ie (for example %pil) are not guaranteed to cause
a return from this service.
It seems that only first generation Niagara chips are hit by this
bug. My best guess is that later chips implement this in hardware
and wake up anyways from %pil events, whereas in first generation
chips the yield is implemented completely in hypervisor code and
requires %pil to be enabled in order to wake properly from this
call.
Fixes: 87fa05aeb3a5 ("sparc: Use generic idle loop")
Reported-by: Fabio M. Di Nitto <fabbione@fabbione.net>
Reported-by: Jan Engelhardt <jengelh@inai.de>
Tested-by: Jan Engelhardt <jengelh@inai.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
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